Bump manufacturing method

Details Bump manufacturing method Bump manufacturing method

2002-05-03

2004-04-06

Fahmy, Wael (Department: 2814)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S698000, C438S632000

Reexamination Certificate

active

06716739

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority benefit of Taiwan application serial no. 91102775, filed Feb. 19, 2002.
BACKGROUND OF INVENTION
1. Field of Invention
The present invention relates to a method of manufacturing bumps. More particularly, the present invention relates to a process of fabricating bumps that require a shorter contact period with etchant and a thinner photoresist layer.
2. Description of Related Art
In this information explosion age, electronic products are used almost everywhere. Computer and processing stations driven by powerful integrated circuits are employed in offices, educational institutions, recreational industries, business and commercial companies. As electronic technology continues to progress, products having more powerful functions and more attuned to personal needs are developed. Furthermore, most electronic products are increasingly light and compact thanks to the efficient fabrication of many types of high-density semiconductor packages. A major innovation is the flip chip design capable of cramming a considerable number of integrated circuits together. In a flip-chip design, a plurality of bumps is formed on the bonding pads of a silicon chip. Each bump directly contacts with a corresponding contact point on a substrate so that the chip and the substrate are electrically connected. Compared with the conventional wire-bonding and tape automated bonding (TAB) method of joining a chip with a substrate, the flip-chip design has a shorter overall conductive path and hence a better electrical connectivity. In addition, the backside of the chip may be exposed to facilitate heat dissipation during operation. Due to the distinguishing advantages of flip-chip packages, semiconductor manufacturing favors its production.
FIGS. 1
to
7
are partially magnified cross-sectional views of structures on the surface of a silicon wafer showing the progression of steps for producing bumps on the wafer according to a conventional method. As shown in
FIG. 1
, a silicon wafer
110
is provided. The wafer
110
has an active surface
112
. The wafer
110
further includes a passivation layer
114
and a plurality of bonding pads
116
(only one of them is shown) on the active surface
112
of the wafer
110
. The passivation layer
114
exposes the bonding pad
116
.
As shown in
FIG. 2
, an adhesion layer
120
is formed over the active surface
112
of the wafer
110
by conducting a sputtering operation. The adhesion layer
120
covers the bonding pad
116
and the passivation layer
114
. Thereafter, a barrier layer
130
is formed over the adhesion layer
120
by conducting a sputtering or an electroplating operation. A wettable layer
140
is formed over the barrier layer
130
by conducting a sputtering or an electroplating operation. Here, the fabrication of a so-called under-ball metallic layer
142
is complete. The under-ball metallic layer
142
actually is a composite layer comprising the adhesion layer
120
, the barrier layer
130
and the wettable layer
140
.
As shown in
FIG. 3
, a photolithographic operation is conducted by forming a photoresist layer
150
over the wettable layer
140
, exposing the photoresist layer
150
to light and then developing the photoresist layer. Ultimately, a pattern (not shown) is transferred to the photoresist layer
150
. The photoresist layer
150
now contains a plurality of openings
152
(only one is shown) that exposes the wettable layer
140
above the bonding pad
116
.
As shown in
FIG. 4
, metal is deposited to refill the opening by conducting an electroplating operation so that a plurality of solder blocks
160
(only one is shown) is formed inside the opening
152
of the photoresist layer
150
. The solder block
160
completely covers the exposed wettable layer
140
.
As shown in
FIGS. 4 and 5
, the photoresist layer
150
is completely removed from the top of the wettable layer
140
.
As shown in
FIGS. 5 and 6
, the under-ball metallic layer
142
outside the solder block
160
region is removed by etching. Consequently, only the residual under-ball metallic layer
142
remains underneath the solder block
160
. The passivation layer
114
above the wafer
110
is now exposed.
As shown in
FIG. 7
, a reflux operation is conducted by sprinkling flux over the wafer
100
and heating to a temperature such that the solder block
160
starts to melt and turns into a hemispherical shape bump
170
. The bump
170
is actually a composite structure that includes the under-ball metallic layer
142
and the solder block
160
.
In the fabrication process as shown in
FIGS. 1
to
7
, etchant is used to remove the wettable layer
140
, the barrier layer
130
and the adhesion layer
120
in sequence (not shown). During etching, the etchant may come in contact with the solder block
160
and etch away a portion of the solder block
160
layer. Hence, overall thickness of the solder block
160
may be reduced leading to material wastage and difficulty in controlling solder block
160
quality. Furthermore, when the etchant for etching the wettable layer
140
and the barrier layer
130
is improperly prepared, the etchant may act on the solder block
160
. The etchant may peel off the solder block
160
from the wettable layer
140
before the wettable layer
140
and the barrier layer
130
are removed. Moreover, to match the dimension of the under-ball metallic layer
160
, cross-sectional area of the opening
152
in the photoresist layer
150
must be set to a small value so that the solder block
160
inside the opening
152
is thick. Consequently, the photoresist layer
150
must have comparable thickness resulting in a higher cost of production.
SUMMARY OF INVENTION
Accordingly, one object of the present invention is to provide a process of fabricating bumps capable of reducing contact with etchant and the wasting of solder blocks so that the solder block is more accurately shaped.
A second object of this invention is to provide a process of fabricating bumps such that the peeling of solder blocks due to etchant is prevented.
A third object of this invention is to provide a process of fabricating bumps that involves the formation of an opening having a large cross-sectional area in a photoresist layer during the photolithographic process. Consequently, a smaller amount of metallic material needs to be deposited into the opening and the resulting solder block has a minimal height. Ultimately, a thinner photoresist layer is required and hence production cost is reduced.
Note in the following description that the use of the preposition “over” as in “a second layer is formed over a first layer” means that the second layer is either in contact with the first layer or simply above the first layer.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a process of fabricating bumps on a silicon wafer. The wafer has an active surface with a passivation layer and a plurality of bonding pads thereon. The passivation layer exposes the bonding pads. First, an adhesion layer is formed over the active surface of the wafer. The adhesion layer covers the bonding pads and the passivation layer. A barrier layer is formed over the adhesion layer and then a wettable layer is formed over the barrier layer.
A first photolithographic process is carried out to form a plurality of photoresist blocks over the wettable layer. Thereafter, a first etching operation is conducted to remove the wettable layer and the barrier layer outside the photoresist covered region. The photoresist blocks are removed.
A second photolithographic process is carried out to form a photoresist layer over the adhesion layer. The photoresist layer has a plurality of openings that expose the wettable layer and the adhesion layer around the barrier layer. A metal-filling operation is conducted to form solder blocks inside the openings in the photoresist layer. The solder blocks cover the wettable layer and the adhesio

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