Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-11-09
2003-04-01
Paladini, Albert W. (Department: 2827)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000, C228S180210, C228S180220
Reexamination Certificate
active
06541364
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a bump forming method of and bump forming apparatus for forming bumps on electrode portions, which are to be formed as so-called semiconductor device terminals, of a semiconductor wafer, a board having an electronic circuit formed thereon, or the like, using conductive particles.
2. Description of Prior Arts
There have been many kinds of bump forming methods and bump forming apparatuses. For example, there are a plating method in which metal is deposited on electrode portions of a semiconductor device through plating to form bumps, a printing method in which solder paste is printed on electrode portions of a semiconductor device and then heated to melt the solder in the solder paste to form bumps, and a stud bump method in which an end of a metallic wire is connected to an electrode portion of a semiconductor device and then the connected wire is cut off to form bumps.
Further, there is a solder ball mounting method in which solder balls (conductive particles) are sucked into a jig by vacuum suction to apply flux onto bottom surfaces of the solder balls, and the solder balls are mounted onto electrode portions of a wafer or a circuit board, and then the solder balls are heated and melted to form bumps.
As electronic products are being downsized and grown more powerful, the bump pitch and the bump diameter are rapidly being decreased as an IC package is changed from a QFP (quad flat package) to a BGA (ball grid array) and further from a CSP (chip size package) to a flip chip.
As the IC is being downsized, the conventional plating method is difficult to form bumps having a sufficient volume and further has a problem that the plating time requires a long time.
On the other hand, the conventional printing method has a problem that when the bumps of an IC are connected to a circuit board or the like, it is difficult to connect all of the bumps correctly because deviations occur in the bump volume and the bump height.
Further, the conventional stud bump method has a problem that the electrically conductive material of the circuit board used for being connected to the bumps is limited because the material of the bumps is gold.
Further, the conventional solder ball mounting method has the problems that number of balls capable of mounting at a time is only several hundreds and that the ball can not be mounted unless the diameter of the ball is above 300 &mgr;m though the bumps can be formed without deviations in the bump volume and the bump height.
In addition to the above problems, there is a problem that since time required for mounting the solder ball is approximately 15 seconds/mounting, it takes more than several hours to mount several tens thousands solder balls and accordingly the productivity is low.
In more detail, there are the following technologies A to I known in the art which are described below. As disclosed in Japanese Patent Application Laid-Open No. 9-46704, a bump forming method of known technology (Example A) comprises a flux applying process of partially applying flux only surfaces of pads on a circuit board to form the bumps thereon; a solder ball adhering process of flux-adhering solder balls onto the surfaces of the solder pads through a mask having through holes capable of letting the solder balls pass through, the through hole being opposite to the solder pad; and a heating process of heating at a solder melting temperature after removing the mask to forming the solder bump.
In the bump forming method of Example A, many solder balls remaining in the regions other than the through holes of the mask are dropped down by turning over the circuit board and the mask together.
As disclosed in Patent Publication No. 2663927, a bump forming method of known technology (Example B) comprises a solder paste printing process of partially printing solder paste only onto surfaces of solder pads on a circuit board to form solder bumps thereon; and a solder ball pressing process of rutting solder balls into through holes of a mask opposite to the solder pads and capable of letting the solder balls pass through and pressing the solder balls from the upper side using projections each having a diameter smaller than the diameter of the solder ball.
As disclosed in Japanese Patent Application Laid-Open No. 6-291122, a bump forming method of known technology (Example C) is that perforations with bottom are bored in a mask, and solder balls are put into these perforations, and then excess solder balls are discharged through a solder ball discharging port by moving a brush along the upper surface of the mask.
As disclosed in Japanese Patent Application Laid-Open No. 7-254777, a bump forming method of known technology (Example D) is that a solder pad forming solder bumps on a chip part and a mask having through holes capable of letting solder balls pass through are positioned, and then the solder balls supplied to a box-shaped side wall are moved so as to be dropped into the through holes of the mask.
As disclosed in Japanese Patent Application Laid-Open No. 7-202403, a bump forming method of known technology (Example E) is that a solder pad forming solder bumps on a chip part and a mask having through holes capable of letting solder balls pass through are positioned, and then the solder balls supplied to a ball hopper are moved so as to be dropped into the through holes of the mask.
As disclosed in Japanese Patent Application Laid-Open No. 9-107045, a bump forming method of known technology (Example F) is that solder paste is partially applied onto only the 26 surfaces of solder pads on a BGA package to form solder bumps thereon, and a mask having through holes capable of letting solder balls pass through is positioned, and then a squeegee is moved to put the solder balls into the through holes of the mask.
As disclosed in Japanese Patent Application Laid-Open No. 11-135565, a bump forming method of known technology (Example G) is that flux is partially applied onto only the surfaces of bump pads on a board to forming solder bumps thereon, and a mask having through holes capable of letting solder balls pass through is positioned, and then the solder balls are heated after pressing the solder balls using a solder ball pushing plate.
As disclosed in Patent Publication No. 2713263, a bump forming method of known technology (Example H) is that cream solder is partially applied onto only the surfaces of pads on a print board to form solder bumps thereon, and a nozzle portion having a through hole capable of letting solder ball pass through is positioned, and then the solder ball is heated after pressing the solder ball in the nozzle portion onto the print board.
As disclosed in Patent Publication No. 2891085, a bump forming method of known technology (Example I) comprises a flux applying process of partially applying flux only surfaces of solder ball electrodes on a semiconductor element to form bumps thereon; a process of adhering solder balls onto the surfaces of the solder ball electrodes through a mask having through holes capable of letting the solder balls pass through, the through hole being opposite to the solder pad; and a process of dropping down many solder balls remaining in the regions other than the through holes of the mask by slightly tilting the semiconductor element and the mask together.
Further, there is a known technology titled “Solder Ball Supply Apparatus” disclosed in Japanese Patent Application Laid-Open No. 9-134923 which is similar to Example A.
In addition to the known technologies of Examples A to I, there is another known technology titled “Method of Mounting Conductive Balls on a Substrate” disclosed in Patent Application Laid-Open No. 2000-133923.
The “method of mounting conductive balls on a substrate” disclosed in Patent Application Laid-Open No. 2000-133923 is that a flat-plate shaped positioning means having many conductive ball receiving holes is arranged on a downward tilt, and a plurality of conductive balls are supplied to the positioning means from a ba
Itsuji Takayuki
Kondo Kunio
Matsui Jun
Mukuno Hideki
Uchiyama Kaoru
Crowell & Moring LLP
Paladini Albert W.
Zarneke David A.
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