Built-in self test for a thermal processing system

Details Built-in self test for a thermal processing system Built-in self test for a thermal processing system

2005-09-01

2008-10-28

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C702S182000, C702S183000, C702S185000

Reexamination Certificate

active

07444572

ABSTRACT:
A method of creating and/or modifying a built-in self test (BIST) table for monitoring a thermal processing system in real-time that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response; creating a measured dynamic process response; determining a dynamic estimation error; determining if the determined dynamic estimation error can be associated with a pre-existing BIST rule in the BIST table; creating a new BIST rule when the dynamic estimation error cannot be associated with any pre-existing BIST rule in the BIST table; and stopping the process when a new BIST rule cannot be created.

REFERENCES:
patent: 5642296 (1997-06-01), Saxena
patent: 6195621 (2001-02-01), Bottomfield
patent: 6351723 (2002-02-01), Maekawa
patent: 6803548 (2004-10-01), Wang et al.
European Patent Office, International Search Report and Written Opinion for PCT/US2006/026128, 8 pp., Nov. 20, 2006.

Affiliated with

Also associated with

Rating

Built-in self test for a thermal processing system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Built-in self test for a thermal processing system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Built-in self test for a thermal processing system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4017812