Buffer room logic in data storage device and method for controll

Details Buffer room logic in data storage device and method for controll Buffer room logic in data storage device and method for controll

1998-06-26

2000-10-17

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 29, 710 52, 710 57, 710 59, 714 45, 714 48, 714 54, G06F 300

Patent

active

061346101

ABSTRACT:
A buffer room logic buffers data transferred between a host and a data storage device with a data write verification capability and stores data on a predetermined recording medium. The buffer room logic has first and second buffer counters, first and second comparators, first and second switches, and a controller. The first and second buffer counters count pulses generated at the end of a data transfer from a host interface and at the end of a data write. The first comparator compares the value of the first buffer counter with the value of a maximum buffer counter indicating a maximum size of a buffer memory, and outputs a pulse to the host interface so as to stop data transfer from the host if the comparison results in a host-no-room condition. The second comparator compares the value of the second buffer counter with the value of the maximum buffer counter, and outputs a pulse to a recording medium interface so as to stop transfer of data read from the recording medium if the comparison results in a disk-no-room condition. The first and second switches are connected between the first buffer counter and the recording medium interface, and between the second buffer counter and the recording medium interface, respectively, and are switched on/off by a predetermined control signal. The controller generates the control signal for switching on and off the first and second switches, respectively so as to provide the pulse generated at the end of every data write operation to the first buffer counter.

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