Buffer memory device controlled by a least recently used method

Details Buffer memory device controlled by a least recently used method Buffer memory device controlled by a least recently used method

1986-06-17

1988-07-05

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

G11C 1300

Patent

active

047559683

ABSTRACT:
A buffer memory device is formed of: a plurality of memory blocks each comprising a register and a comparator for comparing the content of said register and the input data. A control circuit controls the shift of the data of said registers in such a manner that only the contents of said registers from the first memory block to a desired memory block are shifted.

REFERENCES:
patent: 3827028 (1974-07-01), Kashio
patent: 3896417 (1975-07-01), Beecham
patent: 3942163 (1976-03-01), Goyal
patent: 4346459 (1982-08-01), Sud et al.
patent: 4388701 (1983-06-01), Aichelmann, Jr. et al.
"Computer Architecture", by Hiroshi Yamada, pp. 123 to 131, Sangyo Tosho Publishing Ltd.
"Basic Integrated Circuit Engineering", by D. J. Hamilton and W. G. Howard, pp. 566 to 567, McGraw-Hill.

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