Buffer layers for device isolation of devices grown on silicon

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S483000, C438S046000, C438S029000, C257SE21218

Reexamination Certificate

active

07494911

ABSTRACT:
Various embodiments proved a buffer layer that is grown over a silicon substrate that provides desirable isolation for devices formed relative to III-V material device layers, such as InSb-based devices, as well as bulk thin film grown on a silicon substrate. In addition, the buffer layer can mitigate parallel conduction issues between transistor devices and the silicon substrate. In addition, the buffer layer addresses and mitigates lattice mismatches between the film relative to which the transistor is formed and the silicon substrate.

REFERENCES:
patent: 6372981 (2002-04-01), Ueda et al.
patent: 7323764 (2008-01-01), Wallis
patent: 2003/0012249 (2003-01-01), Eisenbeiser
patent: 2004/0069991 (2004-04-01), Dunn et al.
patent: 2004/0169180 (2004-09-01), Udagawa

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