Buffer control circuit of memory device

Details Buffer control circuit of memory device Buffer control circuit of memory device

2011-06-14

2011-06-14

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189080

Reexamination Certificate

active

07961528

ABSTRACT:
A buffer control circuit of a memory device has an auto-refresh buffer controller configured to detect a data training operation in an auto-refresh mode and a controller configured to enable an input buffer in response to an enable signal generated in the data training operation by the auto-refresh buffer controller.

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patent: 1020070038774 (2007-04-01), None

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