Buffer and method for transferring data therein

Electronic digital logic circuitry – Tri-state – With field-effect transistor

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326 81, 326 83, H03K 1900, H03K 190175

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active

058642439

ABSTRACT:
A mixed voltage compatible buffer having reduced power consumption is provided. One embodiment of the buffer according to the present invention comprises: a data input configured to receive an output data signal; a data interface configured to couple with a pad interconnect; an output driver coupled with said data interface and being configured to apply the output data signal thereto; and a data controller intermediate said data input and said output driver, said data controller being configured to apply a plurality of control signals of substantially equal voltage to said output driver to control the operation thereof responsive to the output data signal received via said data input. The present invention also provides for a method of transferring data within the buffer.

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Marcel J. M. Pelgrom and E. Carel Dijkmans, "A 3/5 V Compatible I/O Buffer", IEEE J. of Solid-State Circuits, vol. 30, No. 7, pp. 823-825, Jul. 1995.
John Williams, "Mixing 3-V and 5-V ICs", IEEE Spectrum, pp. 40-42, Mar. 1992.

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