Bridge-free self aligned silicide process

Details Bridge-free self aligned silicide process Bridge-free self aligned silicide process

1996-10-07

1998-05-19

Quach, T. N.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438305, 438586, 438651, 438683, H01L 21283, H01L 21336

Patent

active

057535574

ABSTRACT:
A method of forming a transistor having silicide contacts to shallow gate, source and drain regions 18 in a substrate 10 is disclosed. The transistor has an extended sidewall spacer that covers an outer top portion of the gate. The extended sidewall spacers of the invention extend the distance (leakage path) between the gate and the source/drain thereby reducing the leakage current. The transistor is provided having a gate electrode 12,14,16 and spaced lightly doped source and drain regions 18. A key part of the invention is that the gate insulating layer 16 is laterally etched forming a gate cap insulating layer 16A which only covers an inner central portion of the gate 14. Next, a dielectric layer 20 is formed over the lightly doped source and drain regions 18 and the gate electrode 12,14,16A . The dielectric layer 20 is then anisotropically etched forming extended sidewall spacers 20A which cover the outer top portion of the gate 14. Next, the gate cap insulating layer 16A is removed thereby exposing the top of the gate 14. A metal layer 22 is deposited over the lightly doped source and drain regions 18, the sidewall spacers 20A, and the gate 14. The substrate 10 is then heated thereby forming a metal silicide layer 22A on the lightly doped source and drain regions 18 and the gate 14. The metal layer 22A is then removed from the sidewall spacers 20A. The substrate 10 is implanted with impurity ions forming highly doped source and drain regions 26 and forming a doped gate region 27.

REFERENCES:
patent: 4786609 (1988-11-01), Chen
patent: 4818715 (1989-04-01), Chao
patent: 4885259 (1989-12-01), Osinski et al.
patent: 5352631 (1994-10-01), Sitaram et al.
patent: 5447875 (1995-09-01), Moslehi
patent: 5472895 (1995-12-01), Park
patent: 5661052 (1997-08-01), Inoue et al.
patent: 5682055 (1997-10-01), Huang et al.
"Novel Process For Eliminating Salicide Bridging", IBM Technical Disclosure Bulletin, vol. 30, No. 4, Sep. 1987, pp. 1645-1646.

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