Boundary-free semiconductor memory device

Details Boundary-free semiconductor memory device Boundary-free semiconductor memory device

1987-12-14

1989-03-07

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, G11C 800

Patent

active

048112976

ABSTRACT:
An entire chip is divided into N blocks (N=n.times.m) in accordance with a desired rectangular group of bits (n.times.m bits). The same row decoder is provided for every m blocks, and a row address A.sub.R or a row address A.sub.R+1 adjacent thereto is given to the row decoders. Similarly, the same column decoder is provided for every m blocks, and a column address A.sub.C or a column address A.sub.C +1 adjacent thereto is given to the column decoders. N bits of memory cells are accessed from the blocks, and the accessed memory cells are rearranged, thereby obtaining a desired rectangular group of bits.

REFERENCES:
patent: 4044339 (1977-08-01), Berg
patent: 4498155 (1985-02-01), Rao
patent: 4596001 (1986-06-01), Baba
patent: 4618947 (1986-10-01), Tran et al.

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