Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-02-20
2004-03-09
Tsai, H. Jey (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S326000, C438S003000
Reexamination Certificate
active
06703654
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to magnetic tunneling junction (MTJ) devices and more particularly to a method of fabricating a bottom electrode for such a device, wherein the method produces an electrode which is smooth, thermally stable and has a low sheet resistance.
2. Description of the Related Art
The magnetic tunneling junction device (MTJ) is essentially a magnetic switch which permits or prevents the flow of spin-polarized tunneling electrons (i.e. the device has a low or a high resistance) through a very thin dielectric spacer layer formed between an upper and lower electrode. Because the tunneling is spin-polarized, the current depends upon the relative orientation of the magnetizations of magnetic layers above and below the spacer layer. Most advantageously, one of the two magnetic layers (the pinned layer) in the MTJ has its magnetization fixed in direction, while the other layer (the free layer) has its magnetization free to move in response to an external switching stimulus. Gallagher et al. (U.S. Pat. No. 5,841,692), teaches a prototypical form of such a device having a usefully large magnetoresistive response and capable of operating at room temperatures.
Magnetic tunneling junction devices are now being utilized as information storage elements in magnetic random access memories (MRAMs). Typically, when used as an information storage or memory device, a sensing current passed through the MTJ indicates if it is in a high or low resistance state, which is an indication of whether its magnetizations are, respectively, antiparallel or parallel. An MTJ device used in this way requires a very smooth bottom electrode if it is to operate most advantageously, particularly when integrated with CMOS devices to which it is connected electrically by means of the bottom electrode. Cardoso et al. (“Electrode roughness and interfacial mixing effects on the tunnel junction thermal stability,” J. of Appl. Phys., Vol. 89, No. 11, Jun. 1, 2001, pp. 6650-6652) verify the adverse effects of roughness of both barrier layers and electrodes in MTJ devices. Tehrani et al. (“Recent Developments in Magnetic Tunnel Junction MRAM,” IEEE Trans. on Magnetics, Vo. 36, No. 5, September 2000, pp. 2752-2757) discuss the vertical integration of MTJ devices and CMOS devices which will proceed most advantageously with smooth electrodes. The extreme thinness of the active layers in an MTJ device (e.g. free, pinned and spacer layers) tend to exacerbate the effects of any surface roughness of the layers on which they are formed (e.g. the electrode layers). Slaughter et al. (U.S. Pat. No. 6,205,052 B1) point out that film surfaces that give rise to interfacial roughness cause unwanted magnetic coupling between magnetic layers, which is called topological coupling. To reduce such unwanted coupling, Slaughter teaches an MTJ device in which a base metal layer is formed on a substrate, a spacer layer is formed between magnetically fixed and free layers, and at least one layer of amorphous structure is formed between the base metal and spacer layers. The amorphous layer taught by Slaughter is a seed layer of tantalum nitride on which is formed a layer of ruthenium. The amorphous seed layer promotes the subsequent amorphous formation of an FeMn pinning layer.
Dill et al. (U.S. Pat. No. 6,114,719) teaches a method of effectively biasing an MTJ device using biasing layers disposed within the device stack, so that its magnetic states are stable, yet there is not required the addition of adjacent magnetic structures which would adversely affect the high device density required for an MRAM array.
Sandhu et al. (U.S. Pat. No. 6,358,756 B1) teach a method of fabricating an MRAM structure wherein the pinned layer is recessed in a trench with the free layer positioned above it and the spacer is placed within an etched insulator positioned between them.
With the exception of Slaughter et al., none of the above cited inventions addresses the problem of device performance degradation resulting from bottom electrodes with rough surfaces. The typical sputter-deposited Cu or Al electrode is too rough to be useful, unless it is treated with various complicated smoothing processes. Although Slaughter et al. provide a smooth electrode, it requires the formation of amorphous layers that extend into the device itself. The present invention provides a simple smooth bottom electrode which can also be advantageously used for integration with CMOS devices.
SUMMARY OF THE INVENTION
It is a first object of the present invention to provide a method for forming a smooth bottom electrode for a magnetic tunneling junction (MTJ) device and to provide the device formed on such an electrode.
It is a second object of the present invention to provide such a smooth electrode with a low sheet resistance.
It is a third object of the present invention to provide an MTJ device with a smooth bottom electrode of low sheet resistance that can be easily fabricated and integrated with associated CMOS circuitry.
It is a fourth object of the present invention to provide a smooth bottom electrode of low sheet resistance that can be formed with control of its uniformity over the surface of a large semiconductor wafer (e.g. 8″ diameter or greater).
It is a fifth object of the present invention to provide an MTJ device exhibiting such features associated with electrode smoothness and low sheet resistance as well controlled magnetization of the free and pinned layers, integrity of the tunnel barrier layer, junction resistance uniformity, large exchange field of the pinned layer and high thermal stability of the pinned layer.
The objects of the present invention will be achieved by use of an NiCr seed layer on which a high melting point metal such as Ru, Ir or Rh can be grown with a close packed crystal plane parallel to the plane of the deposited metal layer (e.g. (111) in FCC of Ir and Rh and (001) in HCP of Ru). In the preferred embodiment disclosed herein, Ru is the preferred metallic layer. A layer of NiCr then grown over the Ru (or other high melting point metal) layer enhances close-packed crystal plane overgrowth. The resulting electrode possesses both surface smoothness and low sheet resistance over a large formation area. The advantageous low resistance properties of such an NiCr/Ru/NiCr layer are a result of the NiCr layer performing as a specularly reflecting layer for the Ru layer. This property is also disclosed for NiCr/Ru/NiCr used in a different context in related patent application HT 00-001, assigned to the same assignee as the present application, and which is fully incorporated herein by reference. An MTJ layer, comprising, in the preferred embodiment, an MnPt pinning layer, a CoFe-Ru-CoFe pinned layer, an AlOx (aluminum oxide) tunneling layer, and a CoFe/NiFe free layer, is sequentially formed upon the bottom electrode in a simple process. There is no interdiffusion between the NiCr/Ru bilayer and the NiCr/MnPt bilayer.
REFERENCES:
patent: 6542342 (2003-04-01), Hayashi et al.
Horng Cheng T.
Tong Ru-Ying
Ackerman Stephen B.
Headway Technologies Inc.
Saile George O.
Tsai H. Jey
LandOfFree
Bottom electrode for making a magnetic tunneling junction (MTJ) does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bottom electrode for making a magnetic tunneling junction (MTJ), we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bottom electrode for making a magnetic tunneling junction (MTJ) will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3208907