Bonding wire for semiconductor device

Details Bonding wire for semiconductor device Bonding wire for semiconductor device

2011-05-31

2011-05-31

Mayo, III, William H (Department: 2835)

Electricity: conductors and insulators

Conduits, cables or conductors

Combined

C174S126200

Reexamination Certificate

active

07952028

ABSTRACT:
A high-performance bonding wire that is suitable for semiconductor mounting technology, such as stacked chip bonding, thinning, and fine pitch mounting, where wire lean (leaning) at an upright position of a ball and spring failure can be suppressed and loop linearity and loop height stability are excellent. This bonding wire for a semiconductor device includes a core material made of a conductive metal, and a skin layer formed on the core material and containing a metal different from the core material as a main component; wherein a relationship between an average size (a) of crystal grains in the skin layer on a wire surface along a wire circumferential direction and an average size (b) of crystal grains in the core material on a normal cross section, the normal cross section being a cross section normal to a wire axis, satisfies an inequality of a/b≦0.7.

REFERENCES:
patent: 5396104 (1995-03-01), Kimura
patent: 6140583 (2000-10-01), Suzuki et al.
patent: 7820913 (2010-10-01), Uno et al.
patent: 2003/0168968 (2003-09-01), Sotani et al.
patent: 2004/0014266 (2004-01-01), Uno et al.
patent: 0 722 198 (1996-07-01), None
patent: 2 200 076 (2010-06-01), None
patent: 62-097360 (1987-05-01), None
patent: 04-079236 (1992-03-01), None
patent: 04-079240 (1992-03-01), None
patent: 04-079242 (1992-03-01), None
patent: 2004-006740 (2004-01-01), None
patent: 2004-031469 (2004-01-01), None
patent: 2004-064033 (2004-02-01), None
patent: 2004-228541 (2004-08-01), None
patent: 2005-268771 (2005-09-01), None
patent: 2006-32934 (2006-02-01), None
patent: 2006-100777 (2006-04-01), None
patent: 2006-190763 (2006-07-01), None
patent: 2007-012776 (2007-01-01), None
patent: 2008-226501 (2008-09-01), None
Extended European Search Report dated Feb. 1, 2011 for EP application No. 09703155, based on PCT/JP2009/050712, and which is the European counterpart of the instant U.S. Appl. No. 12/747,434.
Shingo Kaimori, Tsuyoshi Nonaka and Akira Mizoguchi: “Development of 'Hybrid Bonding Wire' ”, SEI Technical Review Journal, No. 63, Dec. 2006, pp. 14-18.
Seiichi Suzuki: “Fundamental Principle of EBSP Method and Benefit of Recent Transition to Nanobeam”,Materia Japan, vol. 7, No. 40, pp. 612-616 (2001).
J.J.L. Mulders et al., “3D-EBSD Analysis for Au Bonding Wire Using a Fully Automated Dual-Beam FIB-SEM-EBSP System”,Kenbikyou (Microscope); vol. 41, No. 3, pp. 204-207 (2006).
Tohru Watanabe: Fine Plating (Version II); “Structure and Property Control Theory of Plating Film, New Proposed Theory of Metal Corrosion, and Database of Structure of Plating Film”, 1st printing (Aug. 15, 2007), published by the Nanoplating Laboratory, Tokyo Metropolitan University.

Affiliated with

Also associated with

Rating

Bonding wire for semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bonding wire for semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bonding wire for semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2641717