Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-06-08
2003-04-22
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S614000, C257S780000, C257S781000
Reexamination Certificate
active
06551916
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a novel bond-pad structure with improved stability so as to increase production yields in semiconductor packaging applications. More specifically, the present invention relates to a novel bond-pad structure which eliminates or at least minimizes the bond-pad lift-off (or peeling-off) problems often experienced during the wire bonding process in the packaging of integrated circuits (ICs), with minimum additional effort. With the novel bond-pad structure of the present invention, the failure rate in the production yield due to bond-pad lift-off can be substantially reduced without requiring major modifications in the fabrication process or facility. The present invention also relates to a novel process which implements the improved bond-pad design to increase the production yield so as to reduce the overall production costs for the manufacturing of integrated circuit packages, as well as to the printed circuit boards (PCBs) or other integrated circuit packages that incorporate the novel bond-pad structure disclosed herein.
BACKGROUND OF THE INVENTION
During the formation of printed circuit boards (PCBs) or other integrated circuit (IC) packaging processes, the semiconductor devices provided in the printed circuit board can be respectively connected to the outside via a wire-bonding process. In such a process, one or more bonding pads are provided which are in contact with respective parts of the semiconductive device at the outer-most conductive layer thereof. Then, a bonding wire is bonded onto the bond pad so as to allow the semiconductor device to make electric contact with the inner lead of the IC package.
FIG. 1
is a side view showing a typical bond pad structure and how the metal bond pad is positioned relative to other layers in a multi-layered, or laminated, semiconductor device on a wafer surface. Typically, a metal layer (“metal-
1
, or preferably a “level-
1
” layer as it can be a non-metal layer) is deposited on top of a dielectric layer (dielectric-
1
, or bottom dielectric layer), then another dielectric layer (dielectric-
2
, or middle dielectric layer) is formed on the metal-
1
layer. Finally a third dielectric layer (dielectric-
3
, or top dielectric layer) is deposited on the dielectric-
2
layer using a photolithography technique leaving a bond pad window, within which the metal bond pad layer (metal-
2
or “level
2
”) is deposited. Optionally, a chemically resistant sealing material (such as polyimide) can be deposited on top of the dielectric-
3
layer to form a passivation layer, which provides improved resistance against moisture, contamination, etc. The passivation layer is then etched with photolithography process to expose the pad opening. This completes the most basic bond-pad formation process, and the bond pad structure is now ready for being connected to a bonding wire. One or more conductive filled-holes can be formed inside the dielectric-
2
layer to provide electrical connection between the metal bond pad and the metal-
1
layer. Furthermore, more than one bond pads can be stacked together, each being connected to a respective conductive layer which can be not directly underneath the bond pad. However, this part of the bond pad formation is well known in the art and is thus omitted in the drawings.
The bond peel-off problem occurs when the adhesion force between the metal bond pad (i.e., level-
2
) and the dielectric-
2
layer is not strong enough to resist the thermal and mechanical stress that may be experienced during the wire bonding process to bond the bonding wire to the bond pad. This can also occur between any adjacent layers, for example, between the metal bond pad and an underlying polysilicon layer, between a metal layer and a dielectric layer, between a dielectric layer and a polysilicon layer, and between a barrier layer and a dielectric layer, etc. With the dimension of the semiconductor devices becoming increasingly smaller, the bond-pad peel-off problem becomes substantially more profound, and has become a major factor in holding back further progress in increasing production yields.
FIG. 2
shows a side view of a prior art bond pad structure designed to improve the stability of the bond pad by minimizing the bond pad lift-off problem. A contact, i.e., a via, is formed within the dielectric-
2
layer which is filled with a level-
2
material to form the bond pad open area which is in contact with the underlying level-
1
layer. Each of the level-
1
or level-
2
layer can be a metal or semiconductor (for example, polysilicon) material. This can be a M
2
-via-M
1
structure or a M
2
-contact-polysilicon structure. M
1
indicates a first metal and M
2
indicates a second metal.
FIG. 2
also shows that a small overhang is also formed which extends from the bond pad open area and is deposited on top of the dielectric-
2
layer. As described the metal-
1
layer can be a metal layer or a polysilicon layer. Typically, the underlying layer (level-
1
layer) has good adhesive characteristic with the metal layer, and the large contact surface provided by the formation of the via provides a substantially enhanced adhesion. However, under the high thermal and/or vibrational stress encountered during the wire bonding process, cracks can be formed in the portion of the dielectric-
2
layer underlying the overhang. Once the crack is formed, it can propagate along the interface between the metal bond pad and the dielectric-
2
layer, thus causing the bond pad peeling-off to occur.
Typically, the wire bonding process can be approximately categorized into two main types: the gold wire/gold ball bonding process and the aluminum wire wedge bonding process. The aluminum wire wedge bonding process is widely used in chip-on-board (COB) applications in which the aluminum wire is welded to the bond pad via a combination of ultrasonic vibrations and pressure applied to the wedge. The gold wire/gold ball bonding process is typically accomplished by pressing the wire, which is first formed into a ball, against the bond pad at an elevated temperature. The aluminum wire wedge bonding process is generally less accurate in establishing the bonding position and less uniform in the applied bonding pressure, and, hence, it is more prone to the bond peel-off problem relative to the gold wire/ball bonding process, mainly due to the non-uniformity of mechanical and/or thermal stresses.
FIG. 3
shows the cross-section of another prior art improved bond pad structure, in which a plurality of anchors are formed inside the dielectric-
2
layer connecting the metal bond pad and the metal-
1
layer. The anchors provide newly increased horizontally contacting surface with the metal-
1
layer, as well as extra vertically contacting surface with the dielectric-
2
layer. Both can contribute to an increased adhesion force and increased stability of the metal bond pad.
Bond-pad peeling-off or lift-off has been a major unsettling problem besetting the integrated circuit packaging industry involving the wire bonding technology. Many possible solutions have been suggested and implemented, as illustrated in the following prior art references.
U.S. Pat. No. 4,060,828 discloses a semiconductor device having a multi-layer wiring structure with an additional through-hole interconnection formed in the insulating layer beneath the bonding pad of the wiring layer. The purpose of the '828 patent is to provide additional, and protected, electrical contact between the bonding pad and another wiring layer therebelow, such that if the exposed portion of the bonding pad is corroded and thus becoming disconnected, the additional electrical contact formed through the insulation layer can still provide the needed connection. While the '828 patent does not directly address the bond pad peel-off problem, the concept of providing a through-hole interconnection structure in the insulation layer immediately underlying the metal layer as disclosed in the '828 patent has been adopted, though mostly in modified form, by essentiall
Chan Chin-Jong
Lin Shi-Tron
Jr. Carl Whitehead
Liauh W. Wayne
Pham Thanhha
Winbond Electronics Corp.
LandOfFree
Bond-pad with pad edge strengthening structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bond-pad with pad edge strengthening structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bond-pad with pad edge strengthening structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3068512