Bond pad functional layout on die to improve package manufactura

Details Bond pad functional layout on die to improve package manufactura Bond pad functional layout on die to improve package manufactura

1996-08-08

1999-04-20

Arroyo, Teresa M.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

257784, 257678, H01L 2348, H01L 2302

Patent

active

058959777

ABSTRACT:
An integrated circuit package which has a staggered bond wire pattern that increases the bond finger width to pad pitch ratio of the package. The package includes a first bond shelf, a second bond shelf and a third bond shelf. Mounted to the package is an integrated circuit which has a plurality of die pads. The die pads are arranged in a pattern of groups, wherein each group has a first die pad that is adjacent to a second die pad, and a third die pad that is adjacent to the second die pad and a first die pad of an adjacent group. Bond wires connect the first die pads to the first bond shelf, the second die pads to the second bond shelf and the third die pads to the third bond shelf, so that each adjacent die pad is connected to a different bond shelf. The staggered bond pattern maximizes the bond finger width of the package.

REFERENCES:
patent: 5091772 (1992-02-01), Kohara et al.
patent: 5309024 (1994-05-01), Hirano

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