Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate
2011-04-19
2011-04-19
Pert, Evan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With electrical contact in hole in semiconductor
Reexamination Certificate
active
07928534
ABSTRACT:
An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, wherein the TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is formed over the backside of the semiconductor substrate and connected to the back end of the TSV. A passivation layer is over the RDL with an opening formed in the passivation layer, wherein a portion of a top surface of the RDL and a sidewall of the RDL are exposed through the opening. A metal finish is formed in the opening and contacting the portion of the top surface and the sidewall of the RDL.
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Shen, L.-C., et al., “A Clamped Through Silicon Via (TSV) Interconnection for Stacked Chip Bonding Using Metal Cap on Pad and Metal Column Forming in Via,” Electronic Components and Technology Conference, 2008, pp. 544-549.
Chen Chen-Shien
Hsu Kuo-Ching
Huang Hon-Lin
Pert Evan
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
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