Bond pad

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C257S774000

Reexamination Certificate

active

07056820

ABSTRACT:
A bond pad upon which a wirebond interconnection is formed, consisting of a first bond pad layer formed on a chip, and a second bond pad layer formed on the first bond pad layer, wherein the first bond pad layer is more resistant to removal than the second bond pad layer during probe testing, and the first bond pad layer increases resistance to interconnection failure during mechanical testing.

REFERENCES:
patent: 5225372 (1993-07-01), Savkar et al.
patent: 5290588 (1994-03-01), Romero et al.
patent: 5356836 (1994-10-01), Chen et al.
patent: 5990011 (1999-11-01), McTeer
patent: 6037668 (2000-03-01), Cave et al.
patent: 6130156 (2000-10-01), Havemann et al.
patent: 6175154 (2001-01-01), Gillespie
patent: 6417572 (2002-07-01), Chidambarrao et al.

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