Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-05-21
2003-11-18
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S307000, C257S309000
Reexamination Certificate
active
06649964
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a body-to-substrate contact structure for a silicon on insulator (SOI) semiconductor device and method for fabricating the same.
2. Description of the Background Art
FIG. 1
is a cross sectional view illustrating a structure of a conventional SOI metal oxide semiconductor field effect transistor (MOSFET).
First, an SOI substrate
100
is prepared. The SOI substrate
100
includes a silicon bulk substrate
101
, a buried oxide film
102
formed on the upper surface of the silicon bulk substrate
101
, and a semiconductor body layer
103
formed on the upper surface of the buried oxide film
102
. The semiconductor body layer
103
is a semiconductor layer on which a source/drain of the MOSFET is to be formed. The semiconductor body layer
103
and the buried oxide film
102
are partially etched and removed, and a device isolation insulating film
104
is formed in the resulting trench between each semiconductor body layer
103
and a neighboring semiconductor body layer
103
.
The semiconductor body layer
103
is doped with p-type or n-type impurities. A n-channel MOSFET (NT) is formed at a p-type semiconductor body doped with p-type impurities, and a p-channel MOSFET (PT) is formed at a n-type semiconductor body doped with n-type impurities.
A gate oxide film
105
and a gate electrode
106
are sequentially stacked on the upper surface of the semiconductor body layer
103
, and a source/drain
107
is formed on the semiconductor body layer
103
at both sides of the gate electrode
106
.
An interlayer insulating film
108
is formed on the entire upper surface of the gate electrode
106
, semiconductor body layer
103
, and device isolation insulating film
104
. Contact holes
109
formed by selectively etching the interlayer insulating film are formed respectively on an upper portion of the source/drain
107
and the gate electrode
106
. Metal wires
110
, e.g., conductive paths for applying a predetermined voltage to the gate electrode
106
and the source/drain
107
, are formed in the contact holes. Meanwhile, a ground power supply, a fixed voltage, is connected to the lower surface of the semiconductor substrate
100
.
The SOI device of
FIG. 1
has various advantages as compared to the semiconductor device fabricated on the silicon bulk substrate. Because a source/drain capacitance is reduced, the SOI device performs a high speed circuit operation well, has a high reliability of isolation between devices, and has a strong resistance to a soft error due to alpha particles. However, it has the following disadvantage. As illustrated in
FIG. 1
, the silicon bulk substrate at the lower portion of the buried oxide film is connected to the ground voltage to thus maintain a fixed voltage, while the semiconductor body layer
103
is not connected to a fixed voltage and isolated from the silicon bulk substrate. Therefore, the potential of the semiconductor body
103
varies according to the variation of voltage applied to the source/drain. As a result, a floating body effect which makes the function of the device unstable occurs. Examples of the floating body effect include a kink effect and a parasitic bipolar effect.
In other words, if a high voltage is applied to the drain, a high electric field occurs, which causes an impact ionization for thereby generating electron-hole pairs around the drain. The holes of the generated electron-hole pairs are injected into the semiconductor body layer and positively charge the semiconductor body layer. If the semiconductor body is positively charged, the potential of the body layer increases and causes variation of the threshold voltage. Accordingly, a kink is shown on a drain current (Id)—voltage (Vd) curve.
In addition, as the potential of the semionductor body layer increases, a source-body junction, e.g., an emitter-base junction, becomes more forwardly biased; thus injecting eletrons from the source toward the body layer. The electrons injected into the body layer increase drain current by reaching a drain depletion region. Thus, a parasitic bipolar effect occurs which disables the control of drain-source current (Ids) by the gate electrode.
The most serious problem in fabricating a SOI device is the floating body effect. In order to disable the floating body effect, the semiconductor body layer must be connected to a fixed voltage. However, it is not easy to connect the semiconductor body layer to a fixed voltage source because the semiconductor substrate and the semiconductor body layer are isolated from each other by an insulating film formed therebetween.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a body-to-substrate contact structure for a SOI device and method for fabricating the same which is capable of suppressing a floating body effect.
It is another object of the present invention to provide a body-to-substrate contact structure for a SOI semiconductor device and method for fabricating the same which has a simple process and wherein the occupying area of the substrate is not increased since no wiring structure is added to a conventional SOI device.
It is another object of the present invention to provide a body-to-substrate contact structure for a SOI semiconductor device and method for fabricating the same which forms a body-to-substrate contact path by forming a semiconductive side wall spacer at a device isolation region.
To achieve these and other objects, there is provided a body-substrate contact structure for an SOI semiconductor device according to the present invention which includes: an SOI substrate having a semiconductor substrate base layer, a buried insulating film formed on an upper surface of the semiconductor substrate base layer, and a semiconductor body layer formed on an upper surface of the buried insulating film, the SOI substrate including a trench exposing an upper surface of the semiconductor substrate base layer; semiconductive side wall spacers formed on side walls of the trench; and a L device isolation insulating film formed in the trench.
To achieve the above and other objects, there is provided a method for fabricating a body-substrate contact structure for a SOI semiconductor device according to the present invention, which includes the steps of: forming a trench in an SOI substrate, the SOI substrate including a semiconductor substrate, a buried insulating film formed on an upper surface of the semiconductor substrate, and a semiconductor body layer formed on an upper surface of the buried insulating film, and the trench exposing the semiconductor substrate; forming semiconductive side wall spacers on side walls of the trench; and forming a device isolation insulating film in the trench.
REFERENCES:
patent: 5340754 (1994-08-01), Witek et al.
patent: 5581101 (1996-12-01), Ning et al.
patent: 5744386 (1998-04-01), Kenney
patent: 5795810 (1998-08-01), Houston
patent: 6013936 (2000-01-01), Colt, Jr.
patent: 6027967 (2000-02-01), Parekh et al.
patent: 6121658 (2000-09-01), Houston
patent: 6235567 (2001-05-01), Huang
patent: 6284593 (2001-09-01), Mandelman et al.
patent: 6288427 (2001-09-01), Huang
patent: 6303434 (2001-10-01), Parekh et al.
patent: 6331720 (2001-12-01), Parekh et al.
Hynix / Semiconductor Inc.
Jr. Carl Whitehead
Schillinger Laura M
LandOfFree
Body-to-substrate contact structure for SOI device and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Body-to-substrate contact structure for SOI device and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Body-to-substrate contact structure for SOI device and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3123384