Block select transistor and method of fabrication

Details Block select transistor and method of fabrication Block select transistor and method of fabrication

1996-11-08

1998-06-09

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438594, 438637, H01L 218247

Patent

active

057633070

ABSTRACT:
A flash memory device having a reduced area is disclosed. The device uses a polyI layer to act as a select transistor for the memory cells comprising the core array. Also, a ground plate is used to isolate the areas of the memory array where high voltage devices should not be located, thereby allowing peripheral components to be fabricated in the core array area. Also disclosed is a polyII layer used to access two sublines controlling two different sectors of the memory array architecture. By using such a layout, die space savings is attained.

REFERENCES:
patent: 4962058 (1990-10-01), Cronin et al.
patent: 5010028 (1991-04-01), Gill et al.
patent: 5597750 (1997-01-01), Pio et al.
patent: 5607873 (1997-03-01), Chen et al.

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