Bit synchronization for high-speed serial device testing

Details Bit synchronization for high-speed serial device testing Bit synchronization for high-speed serial device testing

2007-11-13

2007-11-13

Lamarre, Guy (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Skew detection correction

C714S724000, C714S742000, C324S073100, C326S016000

Reexamination Certificate

active

11120368

ABSTRACT:
An apparatus for testing electronic devices employs a programmable device to adjust the timing of the strobes such that the strobes sample the bit stream from a device under test at or near the center of the bit position. The strobe time adjustment is performed based on pairs of strobe readings made around a number of different bit positions. The programmable device examines the pairs of strobe reading made around each of the different bit positions to determine whether or not a bit transition has occurred there. The programmable device selects the bit positions around which a bit transition has not occurred as eye candidates, and defines the center of the largest contiguous region of eye candidates as the center of the bit position.

REFERENCES:
patent: 6058057 (2000-05-01), Ochiai et al.
patent: 6128754 (2000-10-01), Graeve et al.
patent: 6892338 (2005-05-01), Kawai
patent: 6990423 (2006-01-01), Brown et al.
patent: 7078889 (2006-07-01), Oshima

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