Bit line discharge control method and circuit for a...

Details Bit line discharge control method and circuit for a... Bit line discharge control method and circuit for a...

2007-08-14

2007-08-14

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S200000, C365S230060

Reexamination Certificate

active

10971776

ABSTRACT:
A method of controlling a discharge of bit lines of a matrix of memory cells comprises conditioning a value of a current flowing through a bit line of the matrix during a bit line discharge phase to an absence of an indication of defectiveness of the bit line. The method allows preventing crowbar currents that otherwise flow during the bit line discharge phase when a defective bit line exhibits a short-circuit to a defective word line.

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patent: 6434065 (2002-08-01), Kobayashi et al.
patent: 6643213 (2003-11-01), Perner et al.
patent: 2002/0089879 (2002-07-01), Kobayashi et al.
patent: W/O 98/14947 (1998-04-01), None
European Search Report.

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