Bit line contact structure and fabrication method thereof

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S627000

Reexamination Certificate

active

07084057

ABSTRACT:
A bit line contact structure and fabrication method thereof. The method includes providing a substrate having a transistor, with a gate electrode, drain region, and source region, on the substrate, blanketly forming a first dielectric layer on the transistor using spin coating, and patterning the first dielectric layer, forming a via exposing the drain region.

REFERENCES:
patent: 6066569 (2000-05-01), Tobben
patent: 6475905 (2002-11-01), Subramanian et al.
Hong Xiao, “Introduction to semiconductor manufacturing technology”, 2001, pp. 568-569, Prentice Hall Inc., USA.
Stanley Wolf, “Silicon Processing for the VLSI Era: Process Integration, vol. 2”, 1990, pp. 214-217, Lattice Press, USA.

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