BISR mode to test the redundant elements and regular...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

Reexamination Certificate

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C714S703000

Reexamination Certificate

active

07913125

ABSTRACT:
A BISR mode and associated method for testing memory. All redundant elements of the memory including the ones which are not used are tested, and interaction between redundant elements of the memory and adjacent functional memory are checked. Repair information is used to repair the memory. In addition, redundant elements which are not needed to be used for repairing the memory are forced to be used, such as by faking defects to remap good elements with redundant elements.

REFERENCES:
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patent: 5841709 (1998-11-01), McClure
patent: 6640321 (2003-10-01), Huang et al.
patent: 6661719 (2003-12-01), Shih et al.
patent: 6961880 (2005-11-01), Frankowsky
patent: 6999357 (2006-02-01), Tanishima et al.
patent: 2003/0237061 (2003-12-01), Miller et al.

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