Bipolar random access memory

Details Bipolar random access memory Bipolar random access memory

1984-01-25

1986-11-25

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365190, 365155, G11C 700

Patent

active

046252991

ABSTRACT:
A semiconductor memory device used as a bipolar random access memory including a plurality of pairs of word lines, a plurality of pairs of bit lines, and a plurality of static memory cells located at the intersections of and connected between the pairs of word and bit lines. A plurality of constant current sources are selectively connected to the bit lines. A reading-writing voltage control circuit controls the potential of each bit line during the reading and writing of data and a writing current control circuit controls the current flowing to each bit line during the writing of data into the memory cell. Further, the writing current control circuit connects the constant current source to the reading-writing voltage control circuit in the writing of data to the memory cell. Accordingly, the bipolar random access memory can operate at a high speed with reduced power consumption and without unnecessary current flowing in the peripheral circuits.

REFERENCES:
patent: 4272811 (1981-06-01), Wong
patent: 4459686 (1984-07-01), Toyoda
patent: 4464735 (1984-08-01), Toyoda et al.
IEEE International Solid-State Circuits Conf., Feb. 15, 1979, NY (U.S.), U. Buerker et al.: "An ECL 100K Compatible 1024.times.4b RAM with 15 ns Access Time", pp. 102-103.
Patents Abstract of Japan, vol. 4, Nr. 172 (p-38)(654), Nov. 27, 1980; and JP-A-55 117 790 (Hitachi Seisakusho K.K.) 10-09-80.

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