Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1987-02-24
1989-04-25
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365190, 365177, G11C 700
Patent
active
048254134
ABSTRACT:
A bipolar-CMOS static random access memory device which includes a plurality of static random access memory cells arranged in columns and rows, complementary pairs of bit lines coupled to the cells in each row, word lines coupled to the cells in each row of the cells and a plurality of sense amplifiers and write circuits, with a separate sense amplifier and write circuit coupled to each pair of the complementary bit lines.
REFERENCES:
patent: 4539659 (1985-09-01), Dumont
patent: 4616342 (1986-10-01), Miyamoto
patent: 4646268 (1987-02-01), Kuno
patent: 4658159 (1987-04-01), Miyamoto
Anderson Rodney M.
Gossage Glenn A.
Hecker Stuart N.
Heiting Leo N.
Sharp Melvin
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