BICMOS level shifter of a semiconductor integrated circuit and d

Electronic digital logic circuitry – Interface – Logic level shifting

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Details

326 84, 326110, H03K 1908

Patent

active

055766390

ABSTRACT:
The present invention provides BICMOS level shifter having pull-up and/or pull-down transistors at pull-up and/or pull-down portions, which perform a switching operation in response to a reference signal of a stable voltage level, and a BICMOS data output buffer employing the BICMOS level shifters as respective pull-up and pull-down control circuits. Thereby, it is possible to attain low power consumption, high drive capability and high speed operation by bipolar transistors and is also possible to cope with unstable signals.

REFERENCES:
patent: 4791324 (1988-12-01), Hodapp
patent: 4847522 (1989-07-01), Fuller et al.
patent: 5132568 (1992-07-01), Kim et al.
patent: 5132569 (1992-07-01), Matsuda
patent: 5304869 (1994-04-01), Greason
patent: 5311075 (1994-05-01), Usuki

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