Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2006-01-24
2006-01-24
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S737000
Reexamination Certificate
active
06989606
ABSTRACT:
Typically, primary electrical connection between a semiconductor chip and an external solder ball contact on a Ball Grid or Chip Scale Package is by way of a via extending through a dielectric substrate. The aspect ratio between via diameter and depth is critical for reliable and high yield solder ball attachment during printed circuit board assembly. Excellent ball adherence and reliability of BGA solder ball contacts is achieved through controlling the aspect ratio of the substrate vias by partially plating a solid solderable conductor core in each via. An improved via structure is disclosed wherein the depth of the viva is reduced without the negative effects of alternate methods, such as thinner substrates, or wider vias.
REFERENCES:
patent: 6097089 (2000-08-01), Gaku et al.
patent: 6180504 (2001-01-01), Farnworth et al.
patent: 6833615 (2004-12-01), Geng et al.
Cheng Johnny
Hsu Joyce
Brady III Wade James
Potter Roy
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tung Yingsheng
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