Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Reexamination Certificate
1999-03-01
2004-11-30
Parenkh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Die bond
C257S780000, C257S782000, C257S784000, C257S787000, C257S702000, C257S713000
Reexamination Certificate
active
06825569
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor packaging and specifically to a method for fabricating BGA packages using a substrate having a patterned solder mask with an open die attach area.
BACKGROUND OF THE INVENTION
One type of semiconductor package is referred to as a BGA package. BGA packages were developed to provide a higher lead count, and a smaller foot print, than conventional plastic or ceramic semiconductor packages. A BGA package includes an area array of solder balls that permit the package to be surface mounted to a printed circuit board (PCB) or other electronic component.
One type of prior art BGA package
10
is illustrated in FIG.
1
A. The BGA package
10
includes a substrate
12
, a semiconductor die
16
mounted to the substrate
12
, and an encapsulating resin
38
which encapsulates the die
16
. As shown in
FIG. 1B
, the substrate
12
is initially a segment
32
of a panel
30
. The panel
30
is similar to a lead frame used in the fabrication of conventional plastic semiconductor packages. The panel
30
includes multiple substrates
12
and is used to fabricate multiple BGA packages
10
. Following the fabrication process for the BGA packages
10
, the panel
30
is singulated into individual BGA packages
10
.
Typically, the substrate
12
comprises a reinforced polymer laminate material, such as bismaleimide triazine (BT), or a polyimide resin. As shown in
FIG. 1A
, the substrate
12
includes a planar die attach surface
22
. During a die attach step of the fabrication process, the die
16
is adhesively bonded to the substrate
12
using an adhesive layer
34
.
In addition to the die attach surface
22
, the substrate
12
includes an opposing conductor surface
24
wherein conductors
18
are formed in a required pattern. An opening
26
in the substrate
12
provides access for wire bonding wires
28
to the conductors
18
, and to bond pads (not shown) on the die
16
. In the type of BGA package
10
illustrated in
FIG. 1A
, the die
16
is adhesively bonded face down to the die attach surface
22
, with the bond pads on the die
16
aligned with the opening
26
. Following the wire bonding step, an encapsulating resin
38
such as a Novoloc based epoxy, is molded onto the substrate
12
to encapsulate the die
16
. In addition, a glob top
40
or other encapsulant can be formed over the wires
28
for protection. In some types of BGA packages the die
16
is attached back side down to the substrate
12
, and the wire bonded wires
28
are encapsulated in the encapsulating resin
38
.
The substrate
12
also includes a solder mask
20
A formed on the conductor surface
24
and on the conductors
18
. The solder mask
20
A includes a pattern of via openings
25
, wherein an array of solder balls
14
are located. During a solder ball bonding step, the solder balls
14
are bonded to ball bonding pads
31
on the conductors
18
. Typically, solder ball bonding is performed by applying flux to the ball bonding pads
31
, and to the solder balls
14
. The solder balls
14
are then placed in the via openings
25
, and the assembly is placed in an oven wherein the solder is reflowed to form a metallurgical solder bond. The solder mask
20
A comprises an electrically insulating, low surface tension material, which prevents bridging of the solder material, and shorting between the solder balls
14
in the completed BGA package
10
. In addition, the solder mask
20
A helps to position the solder balls
14
for the solder reflow process.
Typically, the solder mask
20
A comprises a photoimageable material, that can be blanket deposited as a wet or dry film, exposed through a mask, developed and then cured. Wet films are preferred because of their moisture resistance and low cost. Exposure and development of the solder mask
20
A forms the via openings
25
in a required pattern and with required diameters. In addition, exposure and development of the solder mask
20
A removes the mask material from the conductors
18
in a wire bonding area
36
, wherein the wires
28
are wire bonded to the conductors
18
.
In addition to the solder mask
20
A being formed on the conductors
18
, a solder mask
20
B is also formed on the die attach surface
22
. In general, the panel
30
is constructed with the solder mask
20
B on the die attach surface
22
because the mask material is initially blanket deposited on all exposed surfaces of the panel
30
to form the solder mask
20
A. For example, a spray coater or a curtain coater, can be used to blanket deposit the mask material on both the die attach surface
22
, and on the conductor surface
24
of the substrates
12
.
The presence of the solder mask
20
B on the die attach surface
22
of the substrate
12
can cause problems in the BGA package
10
. Firstly, the adhesive layer
34
which bonds the die
16
to the die attach surface
22
must be formed on the solder mask
20
B. In general the solder mask
20
B has a smooth surface, and a low surface tension. Accordingly, the adhesive bond between the die
16
and the solder mask
20
B can be substandard. This can cause the die
16
to pop loose from the die attach surface
22
.
Secondly, the solder mask
20
B has hydrophilic properties, and tends to attract moisture. In order to drive off the moisture, along with solvents and other volatile compounds, a prebaking step can be performed on the solder mask
20
B. However, this extra process step is sometimes not sufficient to prevent trapped moisture in the completed BGA package
10
. Thirdly, the solder mask
20
B can delaminate from the substrate
12
causing cracks to form in the BGA package
10
.
In view of these and other deficiencies in conventional methods for fabricating BGA packages, improvements in BGA substrates, and in fabrication methods for BGA packages, are needed in the art.
SUMMARY OF THE INVENTION
In accordance with the present invention, an improved method for fabricating BGA packages, and an improved substrate for fabricating BGA packages, are provided.
The method, simply stated, comprises forming a substrate having a solder mask that substantially covers both major surfaces thereof, but which is patterned to leave a die attach area on the substrate open. The open die attach area permits a semiconductor die to be bonded directly to the substrate, rather than to the solder mask. This improves adhesion of the die to the substrate, reduces trapped moisture, and prevents delamination of the solder mask in the die attach area.
The substrate can comprise an electrically insulating material, such as bismaleimide triazine (BT). Initially, the substrate can be a segment of a panel which can be used to fabricate multiple BGA packages. The substrate includes a pattern of conductors formed on a first surface thereof, and a die attach area formed on an opposing second surface thereof. A first solder mask is formed on the first surface, and includes a pattern of via openings for attaching solder balls to ball bonding pads on the conductors. A second solder mask is formed on the second surface, and includes openings on the die attach area, permitting the die to be adhesively bonded directly to the substrate.
In an illustrative embodiment, the die is adhesively bonded face down to the substrate. In addition, bond pads on the die are placed in electrical communication with a corresponding pattern of conductors on the substrate, by wire bonding through openings in the substrate. Alternately, a flip chip process, or tape automated bonding, can be used to establish electrical communication between the die and the conductors.
REFERENCES:
patent: 5216278 (1993-06-01), Lin et al.
patent: 5360942 (1994-11-01), Hoffman et al.
patent: 5397921 (1995-03-01), Karnezos
patent: 5409865 (1995-04-01), Karnezos
patent: 5420460 (1995-05-01), Massingill
patent: 5663593 (1997-09-01), Mostafazadeh et al.
patent: 5674785 (1997-10-01), Akram et al.
patent: 5729432 (1998-03-01), Shim et al.
patent: 5734198 (1998-03-01), Stave
patent: 5739585 (1998-04-01), Akram et al.
patent: 5739588 (1998-04-01
Jiang Tongbi
Schrock Edward
Gratton Stephen A.
Micro)n Technology, Inc.
Parenkh Nitin
LandOfFree
BGA package having substrate with patterned solder mask... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with BGA package having substrate with patterned solder mask..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and BGA package having substrate with patterned solder mask... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3354927