Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-08-09
2003-05-13
Meeks, Timothy (Department: 1762)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S653000, C438S679000, C438S680000, C438S685000, C438S687000, C427S097100, C427S250000, C427S255394, C427S255395, C427S255700, C427S305000, C204S192170, C205S157000, C205S184000, C205S186000, C205S187000
Reexamination Certificate
active
06562715
ABSTRACT:
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The invention relates to a barrier layer structure and method of forming the structure for copper metallization.
2. Background of the Invention
Refractory metals and their nitrides have been used extensively as liner/barrier layers in aluminum metallization technology. For example, titanium and titanium nitride (Ti/TiN) are often used to improve adhesion and to minimize aluminum diffusion to underlying layers. However, in advanced integrated circuit fabrication, copper (Cu) and its alloys are increasingly being used for metal interconnects because they have lower resistivities and better electromigration characteristics than aluminum.
In forming copper metal interconnects in contact or via structures, a TiN barrier layer may be deposited by chemical vapor deposition (CVD) to provide conformal step coverage over the contact or via. A Cu layer is then formed on the TiN barrier, filling the contact or via. Thereafter, a planarization technique such as chemical mechanical polishing may be used to remove the Cu/TiN stack lying outside the contact or via, resulting in the formation of a planarized structure, which comprises a Cu plug inside the contact or via. In general, the Cu layer may be formed by electroplating, CVD or physical vapor deposition (PVD). In the case of electroplating, a relatively thin Cu seed layer is usually formed on the TiN barrier layer, in order to facilitate subsequent Cu electroplating.
Although CVD TiN provides conformal step coverage, PVD Ta and TaN are used as barrier materials in current Cu metallization technology, because a copper layer formed on a PVD Ta or TaN surface exhibits a good (111) orientation, which is desirable because it provides better resistance to electromigration and improved lifetime. Despite limited step coverage, the performance of PVD Ta or TaN as barrier layers is sufficient for current applications. For future applications, however, a CVD barrier layer is necessary to provide conformal step coverage. Thus, there is an ongoing need to form improved barrier layers suitable for future generations of Cu metallization.
SUMMARY OF THE INVENTION
The present invention relates to a barrier layer structure and a method of forming the structure for metallization. Embodiments of the invention provide a method of forming a first barrier layer using chemical vapor deposition, forming a second barrier layer using physical vapor deposition, and forming at least one copper layer on the second barrier layer.
REFERENCES:
patent: 3607384 (1971-09-01), Banks
patent: 4169032 (1979-09-01), Haase et al.
patent: 4364099 (1982-12-01), Koyama et al.
patent: 4491509 (1985-01-01), Krause
patent: 4760369 (1988-07-01), Tiku
patent: 4782380 (1988-11-01), Shankar et al.
patent: 4951601 (1990-08-01), Maydan et al.
patent: 4962060 (1990-10-01), Sliwa et al.
patent: 4999096 (1991-03-01), Nihei et al.
patent: 5178739 (1993-01-01), Barnes et al.
patent: 5186718 (1993-02-01), Tepman et al.
patent: 5308793 (1994-05-01), Taguchi et al.
patent: 5354712 (1994-10-01), Ho et al.
patent: 5371042 (1994-12-01), Ong
patent: 5486492 (1996-01-01), Yamamoto et al.
patent: 5534460 (1996-07-01), Tseng et al.
patent: 5565029 (1996-10-01), Takasu
patent: 5613296 (1997-03-01), Kurino et al.
patent: 5654232 (1997-08-01), Gardner
patent: 5674787 (1997-10-01), Zhao et al.
patent: 5846332 (1998-12-01), Zhao et al.
patent: 5910880 (1999-06-01), DeBoer et al.
patent: 5930669 (1999-07-01), Uzoh
patent: 5933753 (1999-08-01), Simon et al.
patent: 5972178 (1999-10-01), Narasimhan et al.
patent: 5972179 (1999-10-01), Chittipeddi et al.
patent: 5985762 (1999-11-01), Geffken et al.
patent: 5989999 (1999-11-01), Levine et al.
patent: 5993916 (1999-11-01), Zhao et al.
patent: 6002174 (1999-12-01), Akram et al.
patent: 6007684 (1999-12-01), Fu et al.
patent: 6013576 (2000-01-01), Oh et al.
patent: 6017817 (2000-01-01), Chung et al.
patent: 6023102 (2000-02-01), Nguyen et al.
patent: 6028003 (2000-02-01), Frisa et al.
patent: 6054382 (2000-04-01), Hsu et al.
patent: 6143646 (2000-11-01), Wetzel
patent: 6146517 (2000-11-01), Hoinkis
patent: 6157061 (2000-12-01), Kawata
patent: 6157081 (2000-12-01), Nariman et al.
patent: 6164128 (2000-12-01), Santa Cruz et al.
patent: 6164138 (2000-12-01), Blake et al.
patent: 6166423 (2000-12-01), Gambino et al.
patent: 6184128 (2001-02-01), Wang et al.
patent: 6184138 (2001-02-01), Ho et al.
patent: 6200433 (2001-03-01), Ding et al.
patent: 6211071 (2001-04-01), Lukanc et al.
patent: 6221775 (2001-04-01), Ference et al.
patent: 6229174 (2001-05-01), Parekh
patent: 6265757 (2001-07-01), Brady et al.
patent: 6268283 (2001-07-01), Huang
patent: 6271084 (2001-08-01), Tu et al.
patent: 6271592 (2001-08-01), Kim et al.
patent: 6274483 (2001-08-01), Chang et al.
patent: 6309801 (2001-10-01), Meijer et al.
patent: 0 818 817 (1998-01-01), None
patent: 05-179437 (1993-07-01), None
patent: 09-186157 (1997-07-01), None
patent: 10-041389 (1998-02-01), None
patent: WO 98/52219 (1998-11-01), None
patent: WO 98/54377 (1998-12-01), None
patent: WO 00/38225 (2000-06-01), None
patent: WO 00/41235 (2000-07-01), None
USSN Ser. No.: 09/635,738, Chen, et al., “Barrier Layer Structure for Copper Metallization and Method of Forming the Structure, ” Filed: Aug. 9, 2000.
R.F. Bunshah, “Handbook of Deposition Technologies for Films and Coatings”, 2ndedition, Noyas Publications, NJ, USA, 1994, 261, 321-325.
Gardner et al., “Encapsulated Copper Interconnection Device using Sidewall Barriers”, Thin Solid Films 262 (1995) 104-119.
Jang et al., “Tantalum and Niobium as a Diffusion Barrier between Copper and Silicon”, J. Materials Science: Materials in Electronics 7 (1996) 271-278.
Electromigration and Diffusion in Pure Cu and Cu(Sn) Alloys. C. K. Hu, K. L. Lee, D. Gupta, and P. Blauner, Mat. Res. Soc. Symp. vol. 427 (96-105).
Electromigration Failure Distributions for Multi-Large Interconnects as a Function of Line Width Experiments and Simulation, D.D. Brown, J.E. Sanchez, Jr., V. Pham, P.R. Besser, M.A. Korhonen, and C.Y. Li, Mat Res. Soc. Symp. vol. 427.
Tadashi Iijima, Yoshiakai Shimooka, and Kyoichi Suguro, “An Amorphous Ti-Si-N Diffusion Barrier Layer for Cu Interconnections,” vol. 78, No. 12, 1995, pp. 67-74.
Mikagi H. Ishikawa, T. Usami, M. Suzuki, K. Inoue, N. Oda, S. Chikaki, I. Sakai and T. Kikkawa. Barrier Metal Free Copper Damascene Interconnection Technology Using Atmospheric Copper Reflow and Nitrogen Doping in SiOF Film. 1996 IEEE. pp. 365-368.
Y. Shacham-Diamand. V. Dubin, and M. Angyal “Electroless Copper Deposition for ULSI” 1995 Elsevier Science S.A., pp. 93-103.
K. Min et al., “Comparative Study of Tantalum and Tantalum Nitride as a Diffusion Barrier for CU Metallization” J. Vac. Sc. Technol. B 14(5), Sep./Oct. 1996, p 1-7.
International Search Report for PCT/US01/26751, dated May 27, 2002.
International Search Report for PCT/US01/24880, dated May 17, 2002.
International Search Report for PCT/US98/09751, dated Sep. 16, 1998.
Chen Ling
Marcadal Christophe
Meeks Timothy
Moser Patterson & Sheridan
LandOfFree
Barrier layer structure for copper metallization and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Barrier layer structure for copper metallization and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Barrier layer structure for copper metallization and method... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3086223