Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Reexamination Certificate
2000-08-31
2003-05-06
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With provision for cooling the housing or its contents
C257S697000
Reexamination Certificate
active
06559537
ABSTRACT:
TECHNICAL FIELD
The invention pertains to methods and apparatus for packaging electronic components such as semiconductor die.
BACKGROUND
The miniaturization of electronic devices such as integrated circuits continues to drive the costs of electronic products down even as the performance of these products increases. The development of improved lithographic methods and other fabrication processes as well as improved packaging and circuit interconnection methods have been important factors this trend.
While improvements in fabrication processes for miniaturization permit inexpensive manufacture of ever smaller devices, the interconnection of smaller devices can be difficult and expensive. In addition, the operation of smaller devices presents additional difficulties. Such smaller devices frequently are required to perform at least the same functions as the larger devices that they replace, and in many cases are expected to perform these functions faster and at a lower cost. A small device that operates at high speeds tends to generate large amounts of heat in a smaller volume, and dissipation of this heat is essential to avoid damage to the device so that the device has an acceptable time to failure. Therefore, improved circuit packages and packaging methods are needed that permit improved heat transfer.
Another significant problem in the use of integrated circuits is packaging the integrated circuit in such a way as to electrically connect to many, densely spaced input/output electrical connections. If the input/output electrical connections must be spread out to permit electrical connections to other integrated circuits, other circuits or circuit components such as printed circuit boards, then much of the advantage of integrated circuit miniaturization is lost.
One method of packaging integrated circuits for electrical connection to a printed circuit board is the so-called ball grid array (BGA) package. A BGA package includes a semiconductor die (an integrated circuit) that is attached to a substrate. Electrical connections are made from the die to the substrate with bond wires that are attached to bond pads provided on the die and the substrate. The bond pads on the substrate are electrically connected to an array of solder balls or bumps, and these solder balls are used to bond and make electrical connection to the printed circuit board. BGA packages are described in, for example, Tsuji et al., U.S. Pat. No. 5,930,603, Tsunoda et al., U.S. Pat. No. 5,914,531, and Tsuji et al., U.S. Pat. No. 5,293,072.
Not only are BGA packages more compact than other packages, BGA packaged devices generally have superior thermal and electrical properties. The solder balls provide an excellent thermal path for the removal of heat from the semiconductor die as well as providing low resistance, low inductance electrical connections. Nevertheless, improved BGA packages that provide even denser interconnections and greater heat removal are needed.
SUMMARY OF THE INVENTION
Containers for packaging semiconductor die are provided that include a thermally conductive strip having recesses configured to retain a semiconductor die. The containers may include at least one die standoff that extends into the recess. The die standoff is configured to provide a thermally conductive path between the semiconductor die and the container and fix the standoff distance. In representative embodiments, the thermally conductive material is a metal such as copper. In additional embodiments, the containers include a mounting surface for attaching the container to a substrate and the die standoff is configured so that a substrate attachment surface of the semiconductor die is substantially coplanar with the mounting surface with the die situated on the die standoff.
Packaged semiconductor die are provided that include a thermally conductive container bonded to the semiconductor die and a substrate bonded to the container. The packaged semiconductor die also include at least one interconnect that electrically connects the semiconductor die to the substrate. In further embodiments, a first surface of the substrate is bonded to the container and at least one solder bump projects from a surface of the substrate opposite the first surface. In still further embodiments, the packaged semiconductor die include a perimeter seal that encapsulates at least a portion of a perimeter of the substrate and a bond cap that encapsulates the interconnect. In other embodiments, the packaged die include an encapsulant that fills a cavity defined by the semiconductor die and the container.
Integrated circuit assemblies are provided that include a substrate and a semiconductor die electrically connected to the substrate. Solder bumps electrically connect the circuit board to the substrate, and the semiconductor die is attached to a thermally conductive container.
Packages for semiconductor die are provided that include a thermally conductive container defining a recess configured to receive a semiconductor die. The packages include a heat sink attached to the container, and, in representative embodiments, the heat sink and the container are of a unitary one-piece integral construction.
Methods of removing heat from a circuit assembly are provided that include providing a container of a thermally conducive material and attaching the semiconductor die to the container with a thermally conductive layer. A cavity defined by the semiconductor die and the container is filled with a thermally conductive encapsulant. In further embodiments, the semiconductor die and the container includes respective substrate mounting surfaces that are selected to be substantially coplanar.
Methods of packaging a semiconductor die include providing a thermally conductive container that includes at least one die support and situating the die at least partially within the container. The die is secured to the container with a heat conductive layer such as a thermally conductive epoxy and the die support is thermally conductive.
Methods of packaging include mounting a plurality of semiconductor die in corresponding cavities formed in a cavity strip; and attaching a substrate strip to the cavity strip. The plurality of die are separated by cutting the cavity strip and the substrate strip after attachment.
These and other features and advantages of the invention are set forth below with reference to the accompanying drawings.
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Bolken Todd O.
Cobbley Chad A.
Klarquist & Sparkman, LLP
Micro)n Technology, Inc.
Potter Roy
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