Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated – With heat sink embedded in encapsulant
Reexamination Certificate
2002-12-19
2004-05-18
Clark, Jasmine (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
With heat sink embedded in encapsulant
C257S675000, C257S777000
Reexamination Certificate
active
06737755
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates in general to integrated circuit packaging, and in particular to a ball grid array package with improved thermal dissipation.
BACKGROUND OF THE INVENTION
High performance integrated circuit (IC) packages are well known in the art. Improvements in IC packages are driven by industry demands for increased thermal and electrical performance and decreased size and cost of manufacture.
In general, array packaging such as Plastic Ball Grid Array (PBGA) packages provide a high density of interconnects relative to the surface area of the package. However, typical PBGA packages include a convoluted signal path, giving rise to high impedance and an inefficient thermal path which results in low thermal dissipation performance. With increasing package density, the spreading of heat generated by the device is increasingly important.
Reference is made to
FIG. 1
which shows an elevation view of a conventional PBGA package indicated generally by the numeral
20
. The PBGA package
20
includes a substrate
22
and a semiconductor die
24
attached to the substrate
22
by a die adhesive. Gold wire bonds electrically connect the die
24
to metal traces on the substrate
22
. The wire bonds and die
24
are encapsulated in a molding compound
26
. Solder balls
28
are disposed on the bottom surface of the substrate
22
for signal transfer. Because of the absence of a thermal path away from the semiconductor die, thermal dissipation in this package is very poor.
One method of improving heat dissipation is the addition of thermal vias in the substrate. The thermal vias connect the die
24
to some of the solder balls
28
for heat dissipation. While these thermal vias are advantageous for thermal dissipation, the thermal vias are small and increased thermal dissipation in high density packages is still desirable.
Variations to conventional BGA packages have been proposed for the purpose of increasing thermal and electrical performance.
FIG. 2
shows an elevation view of a PBGA package of the prior art with a heat sink
30
. The heat sink
30
is comprised of a metal plate added to the upper portion of the package
20
for dissipating heat from the upper surface of the package
20
. This package still suffers disadvantages, however, as heat must be dissipated from the silicon die
24
, first through the molding compound
26
and then through the heat sink
30
. Thus, heat dissipation away from the silicon die
24
in high density packages is still poor.
FIG. 3
shows an elevation view of yet another variation of the conventional BGA package according to the prior art. This package
20
includes a metal heat spreader
32
that is employed to dissipate heat from the semiconductor die
24
to the surrounding environment. The metal heat spreader
34
includes four legs
36
, one leg at each corner. The legs
36
contact ground pads on the substrate
22
, thereby providing four contact points with the ground pads. While this package provides better thermal dissipation than the package of
FIG. 1
, thermal dissipation is still poor and an improved thermal path from the semiconductor die is desirable.
Another example of a variation to conventional BGA packages is described in U.S. Pat. No. 5,977,626, issued Nov. 2, 1999, the contents of which are incorporated herein by reference. The '626 patent discloses a PBGA package having a metal heat spreader in contact with an upper surface of the semiconductor die and ground pads on the substrate. The heat spreader is added to dissipate heat from the semiconductor die to the surrounding environment. These packages also suffer disadvantages, however. One particular disadvantage is that the heat spreader and semiconductor die have significantly different thermo-mechanical properties causing induced stress on the semiconductor die during thermal cycling.
It is therefore an object of an aspect of the present invention to provide a BGA package with enhanced thermal properties.
SUMMARY OF THE INVENTION
In one aspect of the present invention, an integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. A semiconductor die is mounted on the first surface of the substrate and an adapter disposed on the semiconductor die. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate, and an encapsulant encapsulates the wirebonds and a remainder of the semiconductor die. A heat spreader has a top portion in contact with the adapter and at least one sidewall extends from the top portion. At least a portion of the at least one sidewall is in contact with the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.
In another aspect of the present invention, a process for manufacturing an integrated circuit is provided. The process includes: mounting a semiconductor die to a first surface of a substrate; wire bonding the semiconductor die to ones of conductive traces of the substrate; mounting an adapter on a portion of the semiconductor die; encapsulating the wire bonds and a remainder of the semiconductor die in an encapsulant; mounting a heat spreader on the adapter and the substrate such that a top portion of the heat spreader contacts the adapter and at least one sidewall which extends from the top portion and contacts the substrate; and forming a ball grid array on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces.
Advantageously, a material with high thermal conductivity and similar thermo-mechanical properties to the semiconductor die is incorporated into the BGA package, and in contact with both the silicon die and a heat spreader on the upper surface of the package. Thus, the material has a coefficient of thermal expansion (CTE) and an elastic modulus similar to the semiconductor die and provides a thermal conduction path to the surface of the package. Also, heat distribution is enhanced throughout the whole package by increasing the contact between the heat spreader and the substrate.
In one aspect of the present invention, a glob-top encapsulation is used resulting in better wire sway control. Wire sway is the wire displacement during the encapsulation process. The glob-top material has a lower flow viscosity during encapsulation than the mold compound material, resulting in better wire sway control. Also, there is no phase change after the glob-top material is added.
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Lam Wing Keung
McLellan Neil
Sze Ming Wang
Wong Kin-wai
Asat Ltd.
Clark Jasmine
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