Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2008-07-01
2008-07-01
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S033000, C438S068000, C438S113000, C438S160000, C438S443000, C438S458000, C438S459000, C438S460000, C438S464000, C438S667000, C257S502000, C257S520000, C257S621000, C257S686000, C257S774000, C257S777000
Reexamination Certificate
active
07393770
ABSTRACT:
A backside method for fabricating a semiconductor component with a conductive interconnect includes the step of providing a semiconductor substrate having a circuit side, a backside, and a substrate contact on the circuit side. The method also includes the steps of forming a substrate opening from the backside to the substrate contact, and then bonding the conductive interconnect to an inner surface of the substrate contact. A system for performing the method includes the semiconductor substrate, a thinning system for thinning the semiconductor substrate, an etching system for forming the substrate opening, and a bonding system for bonding the conductive interconnect to the substrate contact. The semiconductor component can be used to form module components, underfilled components, stacked components, and image sensor semiconductor components.
REFERENCES:
patent: 3761782 (1973-09-01), Youmans
patent: 4394712 (1983-07-01), Anthony
patent: 4897708 (1990-01-01), Clements
patent: 5229647 (1993-07-01), Gnadinger
patent: 5432999 (1995-07-01), Capps
patent: 5503285 (1996-04-01), Warren
patent: 5649981 (1997-07-01), Arnold et al.
patent: 5674785 (1997-10-01), Akram et al.
patent: 5686352 (1997-11-01), Higgins, III
patent: 5840199 (1998-11-01), Warren
patent: 5950070 (1999-09-01), Razon et al.
patent: 6043564 (2000-03-01), Brooks et al.
patent: 6100175 (2000-08-01), Wood et al.
patent: 6235554 (2001-05-01), Akram et al.
patent: 6251703 (2001-06-01), Van Campenhout et al.
patent: 6326689 (2001-12-01), Thomas
patent: 6368896 (2002-04-01), Farnworth et al.
patent: 6395581 (2002-05-01), Choi
patent: 6400172 (2002-06-01), Akram et al.
patent: 6435200 (2002-08-01), Langen
patent: 6444576 (2002-09-01), Kong
patent: 6451624 (2002-09-01), Farnworth et al.
patent: 6465877 (2002-10-01), Farnworth et al.
patent: 6494221 (2002-12-01), Sellmer et al.
patent: 6501165 (2002-12-01), Farnworth et al.
patent: 6569762 (2003-05-01), Kong
patent: 6582992 (2003-06-01), Poo et al.
patent: 6601888 (2003-08-01), McIlwraith et al.
patent: 6611052 (2003-08-01), Poo et al.
patent: 6614104 (2003-09-01), Farnworth et al.
patent: 6740960 (2004-05-01), Farnworth et al.
patent: 6812549 (2004-11-01), Umetsu et al.
patent: 6828175 (2004-12-01), Wood et al.
patent: 6833612 (2004-12-01), Kinsman
patent: 6833613 (2004-12-01), Akram et al.
patent: 6841883 (2005-01-01), Farnworth et al.
patent: 6848177 (2005-02-01), Swann et al.
patent: 6858092 (2005-02-01), Langen
patent: 6881648 (2005-04-01), Chen et al.
patent: 6936913 (2005-08-01), Akerling et al.
patent: 7119001 (2006-10-01), Kang
patent: 7180149 (2007-02-01), Yamamoto et al.
patent: 2002/0017710 (2002-02-01), Kurashima et al.
patent: 2003/0230805 (2003-12-01), Noma et al.
patent: 2004/0235270 (2004-11-01), Noma et al.
patent: 2004/0256734 (2004-12-01), Farnworth et al.
patent: 2005/0029650 (2005-02-01), Wood et al.
patent: 2005/0082654 (2005-04-01), Humpston et al.
patent: 2005/0205951 (2005-09-01), Eskridge
patent: 2006/0163679 (2006-07-01), LaFond et al.
patent: 2007/0138498 (2007-06-01), Zilber et al.
patent: 2008/0038868 (2008-02-01), Leib
Leon Oboler, “Still at the Head of the Class”, Chip Scale Review, internet article, Jul./Aug. 1999, pp. 1-7.
IBM and SUSS announce semiconductor technology agreement, internet article, Sep. 13, 2004, pp. 1-2.
IBM Research & IBM Systems and Technology Group, C4NP Technology for lead-free wafer bumping, internet article, Sep. 2004, pp. 1-13.
Hembree David R.
Hiatt William M.
Wood Alan G.
Gratton Stephen A.
Jr. Carl Whitehead
Micro)n Technology, Inc.
Mitchell James M
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