Automatic on-die defect isolation

Details Automatic on-die defect isolation Automatic on-die defect isolation

2006-01-20

2010-02-23

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S207000, C257S208000, C257S209000, C257SE23146, C257SE23179

Reexamination Certificate

active

07667231

ABSTRACT:
Microcircuits may include polysilicon features that are vulnerable to defects due to undesirable phenomena during manufacturing processes such as, inter alia, over-etching. The same phenomena that may cause defects can be exploited to automatically isolate the affected circuit and thus limit the harm caused by defects or incipient defects.

REFERENCES:
patent: 4210875 (1980-07-01), Beasom
patent: 6157066 (2000-12-01), Kobayashi
patent: 6753547 (2004-06-01), Devereaux
patent: 7307528 (2007-12-01), Glidden et al.
patent: 7312622 (2007-12-01), Hyde et al.
patent: 7380190 (2008-05-01), Hara et al.

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