Automatic generating of timing constraints for the...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07490307

ABSTRACT:
An apparatus comprising a database, an input module and a software tool. The database may be configured to generate one or more database files representing a design of an integrated circuit (IC). The input module may be configured to generate one or more test structures to test predetermined portions of the design of an IC. The software tool may be configured to automatically generate test scripts to verify timing constraints of the one or more test structures.

REFERENCES:
patent: 6106568 (2000-08-01), Beausang et al.
patent: 2003/0093729 (2003-05-01), Suzuki et al.
patent: 2003/0145286 (2003-07-01), Pajak et al.
patent: 2003/0145297 (2003-07-01), Cote et al.
patent: 2003/0149949 (2003-08-01), Price et al.
patent: 2004/0015798 (2004-01-01), Davidson et al.
patent: 2004/0210806 (2004-10-01), Goyal
patent: 2005/0273673 (2005-12-01), Gassoway
“Primetime: User Guide: Fundamentals” by Synopsys @ Oct. 1999.

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