Automatic fault-testing of logic blocks using internal...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Reexamination Certificate

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07398443

ABSTRACT:
System and method for automatic fault-testing of a logic block and the interfaces of macros with logic gates inside a chip, using an at-speed logic-BIST internal to the chip. Following an initialization of internal storage elements, a set of test signals are generated and processed by the logic block. The output of the logic block is accumulated into a signature and compared to a reference signature to detect faults. Testing can be performed on an ATE (Automatic Test Equipment) using a simple test vector, or can be performed by a field engineer on the actual board comprising the chip.

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Danish Examination Report dated Feb. 28, 2007 in corresponding Singapore Application No. 200506109-8.
European Office Action dated Oct. 30, 2006 in corresponding EP Appl. No. 05255823.6.

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