Automated BIST test pattern sequence generator software...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S736000

Reexamination Certificate

active

07117415

ABSTRACT:
Methods and systems for reducing the volume of test data associated with built in self testing (BIST) test methodologies (e.g., logical BIST, array BIST, etc.) and pattern structures are provided. Embodiments of the present invention store a limited number of “dynamic” test parameters for each test sequence that have changed relative to a previous test sequence.

REFERENCES:
patent: 5951705 (1999-09-01), Arkin et al.
patent: 6282134 (2001-08-01), Kumar
patent: 6323639 (2001-11-01), Park
patent: 2002/0188902 (2002-12-01), Fan et al.

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