Atomically updating 64 bit fields in the 32 bit AIX kernel

Details Atomically updating 64 bit fields in the 32 bit AIX kernel Atomically updating 64 bit fields in the 32 bit AIX kernel

2004-07-08

2008-10-14

Chan, Eddie P (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Logic operation instruction processing

Reexamination Certificate

active

07437541

ABSTRACT:
A method, system, and computer instructions for atomically updating 64-bit fields in the 32-bit AIX kernel, wherein the underlying hardware's 64-bit capable instructions are used to construct an atomic primitive. If a data request applies to the 32-bit kernel on 64-bit hardware execution environment, a load and reserve instruction sets a reservation for a memory location. The original 64-bit data object is decomposed into two 32-bit halves. A Shift Right Double Word Immediate (SRDI) instruction captures the high-order bits of the 64-bit register. If the store conditional instruction determines that the reservation is not lost, the store conditional instruction stores the result. If the store conditional instruction fails, the process returns to the reserve instruction until the store conditional operation returns a success.

REFERENCES:
patent: 5193167 (1993-03-01), Sites et al.
patent: 5933650 (1999-08-01), van Hook et al.

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