Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-07-12
2005-07-12
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S726000
Reexamination Certificate
active
06918074
ABSTRACT:
A testing device uses an input signature register to conduct “at speed” testing of asynchronous circuit responses in an effort to determine the operability of a monitored circuit. Upon receiving an enable signal, the input signature register quickly measures, compresses, and transmits the tested circuit responses so that the responses can be compared with a set of anticipated responses to determine whether the circuit is functioning properly. The enabled input signature register, such as a MISR or a SISR, generates an output signature, which contains the compressed responses of the monitored circuit and helps the testing device analyze circuit performance.
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Kalliat Adarsh
Kim Kee Sup
Prasad Ajith
Su Shyang-Tai Sean
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