Asynchronous communication apparatus using JTAG test data...

Details Asynchronous communication apparatus using JTAG test data... Asynchronous communication apparatus using JTAG test data...

2011-02-15

2011-02-15

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07890824

ABSTRACT:
An adaptation of a test data register (TDR) structure defined by the IEEE 1149.1 Joint Tag Action Group (JTAG) interface standard to provide a debugging path. Existing multi-core processor solutions are covered, but an expansion for a more generic solution is provided. In general, the present apparatus is for extending the IEEE 1149.1 JTAG standard to provide an asynchronous protocol for bypassing test circuitry and bi-directionally communicating with functional circuitry. The apparatus includes an integrated circuit having function register and JTAG standard TDR. Digital logic is configured to control the direct transfer of data between the JTAG standard TDR and the function register.

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