Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-10-14
2000-03-21
Booth, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438307, H01L 2100
Patent
active
060402202
ABSTRACT:
An asymmetrical transistor, and a gate conductor used in forming that transistor, are provided. The gate conductor is formed by removing upper portions of the gate conductor along an elongated axis which the gate conductor extends. The removed portions presents a partially retained region of lesser thickness than the fully retained region immediately adjacent thereto. An implant is then forwarded to the substrate adjacent and partially below the gate conductor. Only the partially retained portions allow a subset of the originally forwarded ions to pass into the substrate to form a lightly doped drain (LDD) between the channel and the drain. The partially retained region occurs only near the drain and not adjacent the source so that the LDD area is self-aligned between the edge of the conductor and a line of demarcation separating the fully retained portion and the partially retained portion. There may be numerous lines of demarcation and corresponding numerous thicknesses across the gate conductor length to provide a graded LDD area if desired.
REFERENCES:
patent: 4663827 (1987-05-01), Nakahara
patent: 4818715 (1989-04-01), Chao
patent: 5654218 (1997-08-01), Lee
patent: 5866448 (1999-02-01), Pradeep et al.
patent: 5880015 (1999-03-01), Hata
Duane Michael P.
Gardner Mark I.
Kadosh Daniel
Advanced Micro Devices , Inc.
Booth Richard
Daffer Kevin L.
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