Asymmetrical SRAM device and method of manufacturing the same

Details Asymmetrical SRAM device and method of manufacturing the same Asymmetrical SRAM device and method of manufacturing the same

2005-03-28

2009-02-03

Huynh, Andy (Department: 2818)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S154000, C257S903000, C257SE27098, C257SE27099, C257SE21661

Reexamination Certificate

active

07486543

ABSTRACT:
In an asymmetrical SRAM device, and a method of manufacturing the same, the asymmetrical SRAM device includes a semiconductor substrate on which a plurality of unit cell regions are defined, and a plurality of active regions formed in each of the unit cell regions of the semiconductor substrate, wherein the active regions of each unit cell region are a mirror image of active regions of an adjacent one of the plurality of unit cell regions with respect to a boundary line between the adjacent unit cell regions.

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Azizi et al. Low-Leakage Asymmetric-Cell SRAM. Aug. 2003. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 11, No. 4. pp. 701-715.
Azizi, Navid, et al., “Low-Leakage Asymmetric-Cell SRAM”.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 11(4), pp. 701-715, (Aug. 2003).

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