Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-06-26
1999-10-05
Chaudhuri, Olik
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
H01L 21336, H01L 21266
Patent
active
059638095
ABSTRACT:
A process for fabricating a transistor in which a first impurity distribution is introduced into a semiconductor substrate prior to the formation of a conductive gate structure on the semiconductor substrate. The substrate includes a channel region disposed between a source region and an LDD region. The LDD region is laterally disposed between a channel region and a drain region. A gate dielectric layer is then formed on an upper surface of the semiconductor substrate. A conductive gate structure is then formed on an upper surface of the gate dielectric layer. A first sidewall of the conductive gate is aligned over a boundary between the source region and the channel region. A second sidewall of the conductive gate is aligned above a boundary between the channel region and the LDD region. A second impurity distribution is then implanted into the semiconductor substrate. The conductive gate structure masks the channel region during the implanting of the second impurity distribution such that the second impurity distribution is introduced into the LDD region as well as the source and drain regions of the semiconductor. An implant dose of the first implant is greater than an implant dose of the second implant such that the transistor includes a lightly doped drain region in close proximity to a drain region for reducing a maximum electric field produced within the channel region during device operation. In addition, the transistor lacks a lightly doped region in close proximity to the source region.
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Duane Michael
Gardner Mark I.
Advanced Micro Devices , Inc.
Chaudhuri Olik
Daffer Kevin L.
Kowert Robert C.
Mao Daniel H.
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