Article and method for in-process testing of RF products

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

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257620, H01L 23544

Patent

active

059427663

ABSTRACT:
A wafer configured for in-process electrical testing is disclosed. According to the invention, a single RF-device monitor is disposed partially in a first street and partially in a second street orthogonal to the first street, between four adjacent dies present on a wafer. With such an arrangement, streets having a width of 100 microns and less are suitable for accomodating a RF-device monitor having a ground-signal configuration. As a result, less space is sacrificed for device monitors than in prior art wafers, thereby increasing the amount of wafer area available for circuitry.

REFERENCES:
patent: 3849872 (1974-11-01), Hubacher
patent: 5059899 (1991-10-01), Farnworth et al.
patent: 5206181 (1993-04-01), Gross
patent: 5214657 (1993-05-01), Farnworth et al.
patent: 5504369 (1996-04-01), Dasse et al.

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