Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
2002-11-08
2004-08-24
Thai, Luan (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257S778000, C257S779000, C257S787000, C257S738000, C257S773000
Reexamination Certificate
active
06781245
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an array structure of solder balls able to control collapse, specifically, to an array structure of solder balls for a BGA package which can control collapse.
2. Description of the Related Art
Integrated circuits plays an important role in current daily life. With increasing development in electronics, electronic products having humanized operation and higher performance are available. Additionally, various products are designed such that the features such as lesser weight and compact size are provided for comfortable use. In the semiconductor fabricating process, a semiconductor product having higher integration is available because of mass production of the 0.18 micrometer integrated circuit.
In general, the production of an integrated circuit (IC) includes three stages: silicon wafer production, semiconductor process and IC packaging.
Owing to the design trend always tends to lighter, thinner, shorter and smaller products, various technologies for packages have been developed. Many fine packages such as chip scale package (CSP), wafer level package or multiple chip module (MCM) are manufactured. In device assembly, a multi-level PCB having higher density can be used to allow the IC package to be arranged on the PCB more compactly.
Because the device with more complex function is developed, the amount of input/output pads for an IC package increases. Owing to shrink the package size, it trends to layout the input/output pads in an area array. Ball grid array package is a typical and popular package using area array in input/output pads layout.
A flip chip technology is often used for a chip scale package. Since bonding pads are arranged in area array, a chip is attached to a carrier through bumps, and solder balls are used to connect the carrier to a substrate in the flip chip technology, the package size and signal transmission path can be reduced. Among the current flip chip products, Ball Grid Array (BGA) package is a common one.
Referring to
FIGS. 1A and 1B
, cross-sectional views of a conventional area array type package structure are shown.
As shown in
FIG. 1A
, pads
104
are formed on a substrate
102
as junctions for external connection. A carrier
106
comprises at least an active surface
101
and a plurality of solder balls
108
are provided thereon.
As shown in
FIG. 1B
, the solder balls
108
on the active surface of the carrier
106
are attached to the pads
104
of the substrate
102
, respectively. At the reflowing step, the eutectic solder balls
108
are melted into solder and wetting to pads
104
of the substrate
102
. As the area
124
for wetting becomes larger, the level of collapse becomes serious. I.e., if the height
122
of the solder ball
108
is lowered, the standoff between the carrier
106
and the substrate
102
is reduced. In case of serious collapse, the standoff between the carrier
106
and the substrate
102
is so small that the adjacent solder balls
108
becomes short to influence adversely the yield
Some packages which require high accuracy for the standoff between the carrier
106
and the substrate
102
, such as cavity down BGA or package having chips thereunder, usually result in low yield due to uncontrolled collapse. The extremely small standoff between the carrier
106
and the substrate
102
generated from undue collapse often makes the solder ball structure with solder joints bad and the endurance for the thermal cycle insufficient.
Therefore, it is one object of the present invention to provide a solder ball array type package structure in which the standoff between the carrier and the substrate can be improved and the level of collapse can be controlled.
It is another object of the present invention to provide a solder ball array type package structure in which the reliability of solder joint can be strengthened in thermal cycle.
It is still another object to provide a structure of solder ball array in which short connection to adjacent solder balls can be prevented and the level of collapse can be controlled.
According to the present invention, a solder ball array type package structure able to control the collapse is provided, comprising at least a substrate, a carrier, a plurality of dies, a molding compound and a plurality of solder balls. The substrate has a first surface. Pads are provided on the first surface of the substrate. The carrier has at least an active surface and a back surface opposite the active surface. A plurality of dies are provided on the back surface and the active surface of the carrier. The dies are arranged on the active surface by flip chip technology. A molding compound overlies on the back surface of the carrier to cover the dies on the back surface of the carrier. Solder balls including base material are provided on the active surface of the carrier in array. In the periphery of the array are provided at least three solder balls, each further having a core of a high melting point (hereinafter, called as “high-melting-temperature” or “HMT” core). The carrier is arranged such that the active surface faces the first surface of the substrate to allow each solder ball correspond to one of the pads, respectively.
According to one preferred embodiment of the present invention, at least three solder balls further having a high-melting-temperature core are provided in the periphery of the solder ball array structure of the present invention to control the collapse of the solder ball and thus ensure the standoff between the carrier and the substrate. The electrical connection of the pads and solder balls on the substrate can be achieved. During the reflowing process, the carrier is supported by the solder balls having high-melting-temperature cores, so that the collapse level is controlled. Then, the short situation of the adjacent solder balls is prevented.
REFERENCES:
patent: 5841198 (1998-11-01), Chia et al.
patent: 5872400 (1999-02-01), Chapman et al.
patent: 6177724 (2001-01-01), Sawai
J.C. Patents
Siliconware Precision Industries Co. Ltd.
Thai Luan
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