Block-level read while write method and apparatus

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S168000, C365S189040, C365S230030

Reexamination Certificate

active

06772273

ABSTRACT:

FIELD OF INVENTION
The present invention relates to flash memory, and more specifically, to partitioning of flash memory.
BACKGROUND OF THE INVENTION
FIG. 1
illustrates one prior art flash memory device
100
. The memory
110
into which data is written has a row decoder
160
and a column decoder
180
associated with it. The row decoder
160
and column decoder
180
permit addressing the rows and columns of memory. A user interface
120
controls the flash memory device
100
. The user interface
120
interfaces with a processor that controls access to the memory
110
. The processor knows the status of the flash memory from the user interface
120
. A status register
130
stores the current status—programming, reading, or erasing—of the memory
110
.
The memory is programmed when a cell's state is electrically changed from a one to a zero. In a typical prior art flash memory this operation has a resolution of a single cell (bit). Programming is typically performed by applying high positive voltage to the gate and drain of a flash cell. The memory is erased by electrically changing a cell's state from a zero to a one. In a typical prior art flash memory this operation has a resolution of 512K cells (block), and may be accomplished by applying negative voltage to the gate and positive voltage to the source. These two operations, programming and erasing, are also called writing. Thus, writing is performed by electrically altering the state of a cell (or cells), including both program and erase operations.
Sense amplifiers
140
are associated with the memory
110
. In one prior art implementation, the sense amplifiers are used to amplify signals for writing to and reading from the memory
110
. For a row divided into sixteen input/outputs (I/Os), sixteen sense amplifiers
140
are used for writing and reading, one for each I/O. A charge pump
150
is further included in the flash memory
100
. The charge pump
150
is used to provide the voltage levels needed for reading from, programming, and erasing the memory
110
. Generally, prior art flash memory devices have two partitions with multiple blocks in each partition.
Typically, a group of blocks form a partition. One partition may be used to store data, and another partition may be used to store code, for example. However, a user can not write to one block of the flash memory while simultaneously reading another block of the memory within the same partition using the prior art read while write memory.
Another disadvantage of the traditional read while write memory is that the number of blocks within a given partition is fixed. For example, if one partition is used to store code, and another partition is used to store data, and if the user does not know what the storage requirements for the code will be, the partition for the code may contain more blocks than are necessary. Thus, a portion of the memory will be unused. The supplier or manufacturer can reduce this waste by providing many partition options, but this increases line-item count which also increases costs.


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