Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2006-04-04
2006-04-04
Elamin, A. (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S400000, C365S230030, C365S230040, C711S005000, C711S105000, C711S167000
Reexamination Certificate
active
07024578
ABSTRACT:
A memory apparatus includes a memory module array having several memory modules. Each memory module has a synchronization connection for receiving a synchronization signal for synchronizing the memory module relative to the other memory modules in the memory module array. This enables combining data bursts read from the memory modules into a data stream.
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German Office Action, dated Feb. 7, 2005, 4 pages.
Prof. Dr.-Ing. Georg Färber et al., “Bussysteme, Parallele und serielle Bussysteme, lokale Netze” R. Oldenbourg Verlag München Wien (1987).
Elamin A.
Fish & Richardson P.C.
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