Array of pull-up transistors for high voltage output circuit

Details Array of pull-up transistors for high voltage output circuit Array of pull-up transistors for high voltage output circuit

2007-03-13

2007-03-13

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S341000, C257S401000, C257S390000

Reexamination Certificate

active

10624506

ABSTRACT:
A pull-up transistor array for a high voltage output circuit is provided. The transistor array includes a semiconductor substrate, an epitaxial layer formed on the semiconductor substrate and N double diffused MOS transistors (DMOS transistors) laterally arranged on the epitaxial layer. One of source/drains of the DMOS transistors is formed at each of transistors, and the N DMOS transistors share another source/drain. Accordingly, the pull-up transistor array may output a signal of a high voltage and high current, and may high-integrate a device because a device isolation region is not required between the DMOS transistors.

REFERENCES:
patent: 5126911 (1992-06-01), Contiero et al.
patent: 5485027 (1996-01-01), Williams et al.
patent: 6331794 (2001-12-01), Blanchard

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