Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2005-01-28
2008-10-28
Phan, Raymond N (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S029000
Reexamination Certificate
active
07444447
ABSTRACT:
A device, arrangement and method may control bus request timing to disperse bus access timing, so that adverse effects of concentration-on-bus phenomenon may be avoided. The device may include a bus request signal generating circuit may generate a bus request signal under control of a counter, and a pulse signal generating circuit may generate a pulse signal as a function of a number of times the bus request signal generating circuit has generated a bus request signal and a first threshold value. The device may include a determining circuit and a control circuit. The determining circuit may generate a determination result representing whether a given process period for generating the bus request signal has ended as a function of the pulse signal. The control circuit may control the counter to adjust the process period for generating the bus request signal, based on the determination result.
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Lee Sung-Kwon
Nam Ki-Chul
Park Chang-Dae
Harness & Dickey & Pierce P.L.C.
Phan Raymond N
Samsung Electronics Co,. Ltd.
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