ARQ combining holdoff system and method

Details ARQ combining holdoff system and method ARQ combining holdoff system and method

2006-04-25

2006-04-25

Decady, Albert (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S799000

Reexamination Certificate

active

07036065

ABSTRACT:
A system and method for demodulating a data packet in an automatic repeat request communication system is disclosed. Specifically, in a communication system that combines the energy of an initially transmitted data packet with the energy of a retransmitted version of the data packet, the inventive system and method measures the “usability” of the initially transmitted data packet that fails an error-checking procedure and the “usability” of a retransmitted version of the data packet. If the initially transmitted version and the retransmitted version of the data packet are both “usable”, the energies of the data packets are combined. The combined data packet is then subjected to the error-checking procedure. If the combined data packet fails the error-checking procedure, the energy of either the combined packet or the retransmitted packet is stored for later combination with a subsequently-retransmitted version of the data packet.

REFERENCES:
patent: 4519068 (1985-05-01), Krebs et al.
patent: 5629948 (1997-05-01), Hagiwara et al.
patent: 5968197 (1999-10-01), Doiron
patent: 5982808 (1999-11-01), Otto
patent: 5983382 (1999-11-01), Pauls
patent: 6128763 (2000-10-01), LoGalbo et al.
patent: 6301681 (2001-10-01), Chen et al.
patent: 6704898 (2004-03-01), Furuskar et al.
patent: 2001/0056560 (2001-12-01), Khan et al.
patent: 2002/0049068 (2002-04-01), Koo et al.
patent: 2002/0196812 (2002-12-01), Yamaguchi et al.
“A Hybrid ARQ Scheme for DS-CDMA Mobile Data Communications”, H. Zhao et al., 1996 5th IEE International, vol. 1, Sep. 29-Oct. 2, 1996, pp 71-75.
“A modified Selective-Repeat Type-II Hybrid ARQ System and Its Performance Analysis”, Y. Wany et al., IEEE Transactions on Communications, vol. com-31, No. 5, May 1983.
“Packet Combining Systems Based on the Viterbi Decoder”, B. Harvey et al., IEEE Transactions on Communications, vol. 42 No. 2/3/4, Feb./Mar./Apr. 1994, pp 1544-1557.
“CMOS Circuit Realization of a Truncated Viterbi Decoder Usibg Pipeline Technique”, H. Ali et al., Eighteenth Nationsl Radio Science Conference, Mar. 27-29, 2001, Mansoura Univ., Egypt.

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