Architecture for a physical interface of a high speed front...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies

Reexamination Certificate

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Details

C713S600000, C710S305000, C375S373000

Reexamination Certificate

active

07624297

ABSTRACT:
A high speed computer processor system includes a high speed interface for a graphics processor. In a preferred embodiment, the high speed interface includes a front side bus (FSB) that interfaces to a similar high speed interface on the graphics processor.

REFERENCES:
patent: 5648994 (1997-07-01), Kao
patent: 5970110 (1999-10-01), Li
patent: 6014047 (2000-01-01), Dreps et al.
patent: 7221727 (2007-05-01), Co
patent: 7234017 (2007-06-01), Biran et al.

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