Approach to improve line end shortening including...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S487000, C438S706000, C438S740000, C438S744000

Reexamination Certificate

active

07115450

ABSTRACT:
A process is described for transferring a photoresist pattern into a substrate. In one embodiment a stack comprised of a top photoresist layer, a middle ARC layer, and a bottom hardmask is formed over a gate electrode layer. A line in the photoresist pattern is anisotropically transferred through the ARC and hardmask. Then an isotropic etch to trim the linewidth by 0 to 50 nm per edge is performed simultaneously on the photoresist, ARC and hardmask. This method minimizes the amount of line end shortening to less than three times the dimension trimmed from one line edge. Since a majority of the photoresist layer is retained, the starting photoresist thickness can be reduced by 1000 Angstroms or more to increase process window. The pattern is then etched through the underlying layer to form a gate electrode. The method can also be used to form STI features in a substrate.

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Stanley Wolf Ph.D. and Richard N. Tauber Ph.D., “Silicon Processing for the VLSI Era”, vol. 1: Process Technology, Lattice Press, 1986, pp. 439-441.

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